This is the mail archive of the
binutils@sourceware.org
mailing list for the binutils project.
[patch] incorrect encoding of ARM cpsie
- From: Paul Brook <paul at codesourcery dot com>
- To: binutils at sourceware dot org
- Date: Tue, 2 Jan 2007 23:09:45 +0000
- Subject: [patch] incorrect encoding of ARM cpsie
The patch below fixes incorrect encoding of the two-argument forms of the
cpsie and cpsid instructions.
Tested with cross to arm-none-eabi.
Ok?
Paul
2007-01-02 Paul Brook <paul@codesourcery.com>
gas/
* config/tc-arm.c (do_cpsi): Set mmod bit for 2 argument form.
gas/testsuite/
* gas/arm/archv6.s: Add more cpsie tests.
* gas/arm/archv6.d: Ditto.
opcodes/
* arm-dis.c (arm_opcodes): Fix cpsie and cpsid entries.
Index: gas/testsuite/gas/arm/archv6.d
===================================================================
--- gas/testsuite/gas/arm/archv6.d (revision 159104)
+++ gas/testsuite/gas/arm/archv6.d (working copy)
@@ -217,3 +217,5 @@ Disassembly of section .text:
0+344 <[^>]*> e6ef2475 ? uxtb r2,r5, ROR #8
0+348 <[^>]*> 16ef2075 ? uxtbne r2,r5
0+34c <[^>]*> 16ef2475 ? uxtbne r2,r5, ROR #8
+0+350 <[^>]*> f10a00ca ? cpsie if,#10
+0+354 <[^>]*> f10a00d5 ? cpsie if,#21
Index: gas/testsuite/gas/arm/archv6.s
===================================================================
--- gas/testsuite/gas/arm/archv6.s (revision 159104)
+++ gas/testsuite/gas/arm/archv6.s (working copy)
@@ -214,3 +214,5 @@ label:
uxtb r2, r5, ROR #8
uxtbne r2, r5
uxtbne r2, r5, ROR #8
+ cpsie if, #10
+ cpsie if, #21
Index: gas/config/tc-arm.c
===================================================================
--- gas/config/tc-arm.c (revision 159104)
+++ gas/config/tc-arm.c (working copy)
@@ -6825,7 +6825,11 @@ static void
do_cpsi (void)
{
inst.instruction |= inst.operands[0].imm << 6;
- inst.instruction |= inst.operands[1].imm;
+ if (inst.operands[1].present)
+ {
+ inst.instruction |= 0x20000;
+ inst.instruction |= inst.operands[1].imm;
+ }
}
static void
Index: opcodes/arm-dis.c
===================================================================
--- opcodes/arm-dis.c (revision 159104)
+++ opcodes/arm-dis.c (working copy)
@@ -814,10 +814,10 @@ static const struct opcode32 arm_opcodes
{ARM_EXT_V6K, 0x0320f000, 0x0fffff00, "nop%c\t{%0-7d}"},
/* ARM V6 instructions. */
- {ARM_EXT_V6, 0xf1080000, 0xfffdfe3f, "cpsie\t%8'a%7'i%6'f"},
- {ARM_EXT_V6, 0xf1080000, 0xfffdfe20, "cpsie\t%8'a%7'i%6'f,#%0-4d"},
- {ARM_EXT_V6, 0xf10C0000, 0xfffdfe3f, "cpsid\t%8'a%7'i%6'f"},
- {ARM_EXT_V6, 0xf10C0000, 0xfffdfe20, "cpsid\t%8'a%7'i%6'f,#%0-4d"},
+ {ARM_EXT_V6, 0xf1080000, 0xfffffe3f, "cpsie\t%8'a%7'i%6'f"},
+ {ARM_EXT_V6, 0xf10a0000, 0xfffffe20, "cpsie\t%8'a%7'i%6'f,#%0-4d"},
+ {ARM_EXT_V6, 0xf10C0000, 0xfffffe3f, "cpsid\t%8'a%7'i%6'f"},
+ {ARM_EXT_V6, 0xf10e0000, 0xfffffe20, "cpsid\t%8'a%7'i%6'f,#%0-4d"},
{ARM_EXT_V6, 0xf1000000, 0xfff1fe20, "cps\t#%0-4d"},
{ARM_EXT_V6, 0x06800010, 0x0ff00ff0, "pkhbt%c\t%12-15r, %16-19r, %0-3r"},
{ARM_EXT_V6, 0x06800010, 0x0ff00070, "pkhbt%c\t%12-15r, %16-19r, %0-3r, LSL
#%7-11d"},