This is the mail archive of the binutils@sources.redhat.com mailing list for the binutils project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

[RFA] Simplify handling of VIA PadLock instructions in gas


This one isn't obvious I guess.

While looking at some local OpenBSD patches for these instructions I
noticed that these were not marked as ImmExt like they are in the
OpenBSD tree even though the wording in the VIA docs suggest that they
should be.  Turns out that the code can be simplified a bit if you do
mark them as ImmExt.

The testsuite doesn't reveal any regressions.
OK?

Mark


Index: include/opcode/ChangeLog
from  Mark Kettenis  <kettenis@gnu.org>

	* i386.h (i386_optab): Mark VIA PadLock instructions as ImmExt and
	adjust them accordingly.

Index: gas/ChangeLog
from  Mark Kettenis  <kettenis@gnu.org>

	* config/tc-i386.c (output_insn): Handle VIA PadLock instructions
	similar to other instructions now that they're marked as ImmExt.

Index: include/opcode/i386.h
===================================================================
RCS file: /cvs/src/src/include/opcode/i386.h,v
retrieving revision 1.55
diff -u -p -r1.55 i386.h
--- include/opcode/i386.h 1 Apr 2005 16:03:39 -0000 1.55
+++ include/opcode/i386.h 11 Apr 2005 22:45:53 -0000
@@ -1378,16 +1378,16 @@ static const template i386_optab[] =
 {"rdtscp",   0, 0x0f01, 0xf9, CpuSledgehammer,NoSuf|ImmExt,	{ 0, 0, 0} },
 
 /* VIA PadLock extensions.  */
-{"xstorerng", 0, 0x000fa7c0, X, Cpu686|CpuPadLock, NoSuf|IsString, { 0, 0, 0} },
-{"xcryptecb", 0, 0xf30fa7c8, X, Cpu686|CpuPadLock, NoSuf|IsString, { 0, 0, 0} },
-{"xcryptcbc", 0, 0xf30fa7d0, X, Cpu686|CpuPadLock, NoSuf|IsString, { 0, 0, 0} },
-{"xcryptcfb", 0, 0xf30fa7e0, X, Cpu686|CpuPadLock, NoSuf|IsString, { 0, 0, 0} },
-{"xcryptofb", 0, 0xf30fa7e8, X, Cpu686|CpuPadLock, NoSuf|IsString, { 0, 0, 0} },
-{"montmul",   0, 0xf30fa6c0, X, Cpu686|CpuPadLock, NoSuf|IsString, { 0, 0, 0} },
-{"xsha1",     0, 0xf30fa6c8, X, Cpu686|CpuPadLock, NoSuf|IsString, { 0, 0, 0} },
-{"xsha256",   0, 0xf30fa6d0, X, Cpu686|CpuPadLock, NoSuf|IsString, { 0, 0, 0} },
+{"xstorerng", 0, 0x000fa7, 0xc0, Cpu686|CpuPadLock, NoSuf|IsString|ImmExt, { 0, 0, 0} },
+{"xcryptecb", 0, 0xf30fa7, 0xc8, Cpu686|CpuPadLock, NoSuf|IsString|ImmExt, { 0, 0, 0} },
+{"xcryptcbc", 0, 0xf30fa7, 0xd0, Cpu686|CpuPadLock, NoSuf|IsString|ImmExt, { 0, 0, 0} },
+{"xcryptcfb", 0, 0xf30fa7, 0xe0, Cpu686|CpuPadLock, NoSuf|IsString|ImmExt, { 0, 0, 0} },
+{"xcryptofb", 0, 0xf30fa7, 0xe8, Cpu686|CpuPadLock, NoSuf|IsString|ImmExt, { 0, 0, 0} },
+{"montmul",   0, 0xf30fa6, 0xc0, Cpu686|CpuPadLock, NoSuf|IsString|ImmExt, { 0, 0, 0} },
+{"xsha1",     0, 0xf30fa6, 0xc8, Cpu686|CpuPadLock, NoSuf|IsString|ImmExt, { 0, 0, 0} },
+{"xsha256",   0, 0xf30fa6, 0xd0, Cpu686|CpuPadLock, NoSuf|IsString|ImmExt, { 0, 0, 0} },
 /* Alias for xstorerng.  */
-{"xstore",    0, 0x000fa7c0, X, Cpu686|CpuPadLock, NoSuf|IsString, { 0, 0, 0} },
+{"xstore",    0, 0x000fa7, 0xc0, Cpu686|CpuPadLock, NoSuf|IsString|ImmExt, { 0, 0, 0} },
 
 /* sentinel */
 {NULL, 0, 0, 0, 0, 0, { 0, 0, 0} }

Index: gas/config/tc-i386.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-i386.c,v
retrieving revision 1.172
diff -u -p -r1.172 tc-i386.c
--- gas/config/tc-i386.c 7 Apr 2005 00:53:19 -0000 1.172
+++ gas/config/tc-i386.c 11 Apr 2005 22:45:48 -0000
@@ -3320,23 +3320,23 @@ output_insn ()
       char *p;
       unsigned char *q;
 
-      /* All opcodes on i386 have either 1 or 2 bytes, PadLock instructions
-	 have 3 bytes.  We may use one more higher byte to specify a prefix
-	 the instruction requires.  */
-      if ((i.tm.cpu_flags & CpuPadLock) != 0
-	  && (i.tm.base_opcode & 0xff000000) != 0)
-        {
-	  unsigned int prefix;
-	  prefix = (i.tm.base_opcode >> 24) & 0xff;
-
-	  if (prefix != REPE_PREFIX_OPCODE
-	      || i.prefix[LOCKREP_PREFIX] != REPE_PREFIX_OPCODE)
-	    add_prefix (prefix);
+      /* All opcodes on i386 have either 1 or 2 bytes.  We may use one
+	 more higher byte to specify a prefix the instruction
+	 requires.  */
+      if ((i.tm.base_opcode & 0xff0000) != 0)
+	{
+	  if ((i.tm.cpu_flags & CpuPadLock) != 0)
+	    {
+	      unsigned int prefix;
+	      prefix = (i.tm.base_opcode >> 16) & 0xff;
+
+	      if (prefix != REPE_PREFIX_OPCODE
+		  || i.prefix[LOCKREP_PREFIX] != REPE_PREFIX_OPCODE)
+		add_prefix (prefix);
+	    }
+	  else
+	    add_prefix ((i.tm.base_opcode >> 16) & 0xff);
 	}
-      else
-	if ((i.tm.cpu_flags & CpuPadLock) == 0
-	    && (i.tm.base_opcode & 0xff0000) != 0)
-	  add_prefix ((i.tm.base_opcode >> 16) & 0xff);
 
       /* The prefix bytes.  */
       for (q = i.prefix;
@@ -3357,13 +3357,7 @@ output_insn ()
 	}
       else
 	{
-	  if ((i.tm.cpu_flags & CpuPadLock) != 0)
-	    {
-	      p = frag_more (3);
-	      *p++ = (i.tm.base_opcode >> 16) & 0xff;
-	    }
-	  else
-	    p = frag_more (2);
+	  p = frag_more (2);
 
 	  /* Put out high byte first: can't use md_number_to_chars!  */
 	  *p++ = (i.tm.base_opcode >> 8) & 0xff;


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]