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Rework MIPS nop-insertion code, add -mfix-vr4130 [10/11]
As promised in the first message, this patch lets gas fill the delay
slots of coprocessor branches with useful insns. All the real work
to make this possible has already been done by the rest of the series.
The patch adjusts the mips2 branch relaxation tests accordingly and adds
a new test to make sure that the situation mentioned in the old comment
is handled correctly.
Tested on mips64{,el}-linux-gnu and mipsisa64{,el}-elf. OK to install?
Richard
* config/tc-mips.c (append_insn): Remove cop_interlocks test from
branch delay code.
testsuite/
* gas/mips/relax-swap1-mips[12].d: Expect the delay slots of
bc1f and bc1t to be filled.
* gas/mips/branch-misc-3.[sd]: New test.
* gas/mips/mips.exp: Run it.
diff -urpN gas.10/config/tc-mips.c gas/config/tc-mips.c
--- gas.10/config/tc-mips.c 2005-03-08 12:19:23.000000000 +0000
+++ gas/config/tc-mips.c 2005-03-08 12:48:34.194265580 +0000
@@ -2513,17 +2513,6 @@ append_insn (struct mips_cl_insn *ip, ex
frags for different purposes. */
|| (! mips_opts.mips16
&& prev_insn_frag_type == rs_machine_dependent)
- /* If the branch reads the condition codes, we don't
- even try to swap, because in the sequence
- ctc1 $X,$31
- INSN
- INSN
- bc1t LABEL
- we can not swap, and I don't feel like handling that
- case. */
- || (! mips_opts.mips16
- && (pinfo & INSN_READ_COND_CODE)
- && ! cop_interlocks)
/* Check for conflicts between the branch and the instructions
before the candidate delay slot. */
|| nops_for_insn (history + 1, ip) > 0
diff -urpN gas.10/testsuite/gas/mips/branch-misc-3.d gas/testsuite/gas/mips/branch-misc-3.d
--- gas.10/testsuite/gas/mips/branch-misc-3.d 1970-01-01 01:00:00.000000000 +0100
+++ gas/testsuite/gas/mips/branch-misc-3.d 2005-03-08 13:14:03.135815087 +0000
@@ -0,0 +1,59 @@
+#as: -march=mips1 -32
+#objdump: -dz
+#name: MIPS coprocessor branches
+
+.*file format .*
+
+Disassembly .*:
+
+0+00 <.*>:
+.* ctc1 a0,\$31
+.* b .*
+.* nop
+#
+.* ctc1 a0,\$31
+.* nop
+.* nop
+.* bc1t .*
+.* nop
+#
+.* c\.eq\.s \$f0,\$f2
+.* b .*
+.* nop
+#
+.* c\.eq\.s \$f0,\$f2
+.* nop
+.* bc1t .*
+.* nop
+#
+.* ctc1 a0,\$31
+.* addiu a1,a1,1
+.* nop
+.* bc1t .*
+.* nop
+#
+.* ctc1 a0,\$31
+.* addiu a1,a1,1
+.* addiu a2,a2,1
+.* bc1t .*
+.* nop
+#
+.* c\.eq\.s \$f0,\$f2
+.* addiu a1,a1,1
+.* bc1t .*
+.* nop
+#
+.* ctc1 a0,\$31
+.* addiu a1,a1,1
+.* addiu a2,a2,1
+.* bc1t .*
+.* addiu a3,a3,1
+#
+.* c\.eq\.s \$f0,\$f2
+.* addiu a1,a1,1
+.* bc1t .*
+.* addiu a2,a2,1
+#
+.* bc1t .*
+.* addiu a3,a3,1
+#pass
diff -urpN gas.10/testsuite/gas/mips/branch-misc-3.s gas/testsuite/gas/mips/branch-misc-3.s
--- gas.10/testsuite/gas/mips/branch-misc-3.s 1970-01-01 01:00:00.000000000 +0100
+++ gas/testsuite/gas/mips/branch-misc-3.s 2005-03-08 13:10:24.264088647 +0000
@@ -0,0 +1,44 @@
+ # ctc1s and compares shouldn't appear in a branch delay slot.
+ ctc1 $4,$31
+ b 1f
+1:
+ ctc1 $4,$31
+ bc1t 1f
+1:
+ c.eq.s $f0,$f2
+ b 1f
+1:
+ c.eq.s $f0,$f2
+ bc1t 1f
+1:
+
+ # The next three branches should have nop-filled slots.
+ ctc1 $4,$31
+ addiu $5,$5,1
+ bc1t 1f
+1:
+ ctc1 $4,$31
+ addiu $5,$5,1
+ addiu $6,$6,1
+ bc1t 1f
+1:
+ c.eq.s $f0,$f2
+ addiu $5,$5,1
+ bc1t 1f
+1:
+
+ # ...but a swap is possible in these three.
+ ctc1 $4,$31
+ addiu $5,$5,1
+ addiu $6,$6,1
+ addiu $7,$7,1
+ bc1t 1f
+1:
+ c.eq.s $f0,$f2
+ addiu $5,$5,1
+ addiu $6,$6,1
+ bc1t 1f
+1:
+ addiu $7,$7,1
+ bc1t 1f
+1:
diff -urpN gas.10/testsuite/gas/mips/relax-swap1-mips1.d gas/testsuite/gas/mips/relax-swap1-mips1.d
--- gas.10/testsuite/gas/mips/relax-swap1-mips1.d 2005-02-28 09:24:25.000000000 +0000
+++ gas/testsuite/gas/mips/relax-swap1-mips1.d 2005-03-08 12:48:34.000000000 +0000
@@ -12,7 +12,7 @@ Disassembly of section \.text:
0+0008 <[^>]*> lw at,2\(gp\)
[ ]*8: R_MIPS_GOT16 \.text
0+000c <[^>]*> nop
-0+0010 <[^>]*> addiu at,at,1000
+0+0010 <[^>]*> addiu at,at,992
[ ]*10: R_MIPS_LO16 \.text
0+0014 <[^>]*> jr at
0+0018 <[^>]*> move v0,a0
@@ -23,7 +23,7 @@ Disassembly of section \.text:
0+002c <[^>]*> lw at,2\(gp\)
[ ]*2c: R_MIPS_GOT16 \.text
0+0030 <[^>]*> nop
-0+0034 <[^>]*> addiu at,at,1000
+0+0034 <[^>]*> addiu at,at,992
[ ]*34: R_MIPS_LO16 \.text
0+0038 <[^>]*> jr at
0+003c <[^>]*> nop
@@ -32,7 +32,7 @@ Disassembly of section \.text:
0+0048 <[^>]*> lw at,2\(gp\)
[ ]*48: R_MIPS_GOT16 \.text
0+004c <[^>]*> nop
-0+0050 <[^>]*> addiu at,at,1000
+0+0050 <[^>]*> addiu at,at,992
[ ]*50: R_MIPS_LO16 \.text
0+0054 <[^>]*> jr at
0+0058 <[^>]*> sw v0,0\(a0\)
@@ -45,7 +45,7 @@ Disassembly of section \.text:
0+0074 <[^>]*> lw at,2\(gp\)
[ ]*74: R_MIPS_GOT16 \.text
0+0078 <[^>]*> nop
-0+007c <[^>]*> addiu at,at,1000
+0+007c <[^>]*> addiu at,at,992
[ ]*7c: R_MIPS_LO16 \.text
0+0080 <[^>]*> jr at
0+0084 <[^>]*> nop
@@ -56,7 +56,7 @@ Disassembly of section \.text:
0+0098 <[^>]*> lw at,2\(gp\)
[ ]*98: R_MIPS_GOT16 \.text
0+009c <[^>]*> nop
-0+00a0 <[^>]*> addiu at,at,1000
+0+00a0 <[^>]*> addiu at,at,992
[ ]*a0: R_MIPS_LO16 \.text
0+00a4 <[^>]*> jr at
0+00a8 <[^>]*> move v0,a0
@@ -69,7 +69,7 @@ Disassembly of section \.text:
0+00c4 <[^>]*> lw at,2\(gp\)
[ ]*c4: R_MIPS_GOT16 \.text
0+00c8 <[^>]*> nop
-0+00cc <[^>]*> addiu at,at,1000
+0+00cc <[^>]*> addiu at,at,992
[ ]*cc: R_MIPS_LO16 \.text
0+00d0 <[^>]*> jr at
0+00d4 <[^>]*> nop
@@ -80,7 +80,7 @@ Disassembly of section \.text:
0+00e8 <[^>]*> lw at,2\(gp\)
[ ]*e8: R_MIPS_GOT16 \.text
0+00ec <[^>]*> nop
-0+00f0 <[^>]*> addiu at,at,1000
+0+00f0 <[^>]*> addiu at,at,992
[ ]*f0: R_MIPS_LO16 \.text
0+00f4 <[^>]*> jr at
0+00f8 <[^>]*> addiu v0,a0,1
@@ -95,7 +95,7 @@ Disassembly of section \.text:
0+011c <[^>]*> lw at,2\(gp\)
[ ]*11c: R_MIPS_GOT16 \.text
0+0120 <[^>]*> nop
-0+0124 <[^>]*> addiu at,at,1000
+0+0124 <[^>]*> addiu at,at,992
[ ]*124: R_MIPS_LO16 \.text
0+0128 <[^>]*> jr at
0+012c <[^>]*> nop
@@ -108,7 +108,7 @@ Disassembly of section \.text:
0+0148 <[^>]*> lw at,2\(gp\)
[ ]*148: R_MIPS_GOT16 \.text
0+014c <[^>]*> nop
-0+0150 <[^>]*> addiu at,at,1000
+0+0150 <[^>]*> addiu at,at,992
[ ]*150: R_MIPS_LO16 \.text
0+0154 <[^>]*> jr at
0+0158 <[^>]*> nop
@@ -119,7 +119,7 @@ Disassembly of section \.text:
0+016c <[^>]*> lw at,2\(gp\)
[ ]*16c: R_MIPS_GOT16 \.text
0+0170 <[^>]*> nop
-0+0174 <[^>]*> addiu at,at,1000
+0+0174 <[^>]*> addiu at,at,992
[ ]*174: R_MIPS_LO16 \.text
0+0178 <[^>]*> jr at
0+017c <[^>]*> sw v0,0\(a0\)
@@ -130,7 +130,7 @@ Disassembly of section \.text:
0+0190 <[^>]*> lw at,2\(gp\)
[ ]*190: R_MIPS_GOT16 \.text
0+0194 <[^>]*> nop
-0+0198 <[^>]*> addiu at,at,1000
+0+0198 <[^>]*> addiu at,at,992
[ ]*198: R_MIPS_LO16 \.text
0+019c <[^>]*> jr at
0+01a0 <[^>]*> sw v0,0\(a0\)
@@ -145,7 +145,7 @@ Disassembly of section \.text:
0+01c4 <[^>]*> lw at,2\(gp\)
[ ]*1c4: R_MIPS_GOT16 \.text
0+01c8 <[^>]*> nop
-0+01cc <[^>]*> addiu at,at,1000
+0+01cc <[^>]*> addiu at,at,992
[ ]*1cc: R_MIPS_LO16 \.text
0+01d0 <[^>]*> jr at
0+01d4 <[^>]*> nop
@@ -158,154 +158,152 @@ Disassembly of section \.text:
0+01f0 <[^>]*> lw at,2\(gp\)
[ ]*1f0: R_MIPS_GOT16 \.text
0+01f4 <[^>]*> nop
-0+01f8 <[^>]*> addiu at,at,1000
+0+01f8 <[^>]*> addiu at,at,992
[ ]*1f8: R_MIPS_LO16 \.text
0+01fc <[^>]*> jr at
0+0200 <[^>]*> move a2,a3
-0+0204 <[^>]*> move v0,a0
-0+0208 <[^>]*> bc1t 00000000 <foo>
-0+020c <[^>]*> nop
-0+0210 <[^>]*> move v0,a0
-0+0214 <[^>]*> bc1f 0000022c <foo\+0x22c>
+0+0204 <[^>]*> bc1t 00000000 <foo>
+0+0208 <[^>]*> move v0,a0
+0+020c <[^>]*> bc1f 00000224 <foo\+0x224>
+0+0210 <[^>]*> nop
+0+0214 <[^>]*> lw at,2\(gp\)
+[ ]*214: R_MIPS_GOT16 \.text
0+0218 <[^>]*> nop
-0+021c <[^>]*> lw at,2\(gp\)
-[ ]*21c: R_MIPS_GOT16 \.text
-0+0220 <[^>]*> nop
-0+0224 <[^>]*> addiu at,at,1000
-[ ]*224: R_MIPS_LO16 \.text
-0+0228 <[^>]*> jr at
-0+022c <[^>]*> nop
-0+0230 <[^>]*> move v0,a0
-0+0234 <[^>]*> b 00000000 <foo>
-0+0238 <[^>]*> nop
-0+023c <[^>]*> move v0,a0
-0+0240 <[^>]*> lw at,2\(gp\)
-[ ]*240: R_MIPS_GOT16 \.text
-0+0244 <[^>]*> nop
-0+0248 <[^>]*> addiu at,at,1000
-[ ]*248: R_MIPS_LO16 \.text
-0+024c <[^>]*> jr at
-0+0250 <[^>]*> nop
-0+0254 <[^>]*> move v0,a0
-0+0258 <[^>]*> b 00000000 <foo>
-0+025c <[^>]*> nop
-0+0260 <[^>]*> move v0,a0
-0+0264 <[^>]*> lw at,2\(gp\)
-[ ]*264: R_MIPS_GOT16 \.text
-0+0268 <[^>]*> nop
-0+026c <[^>]*> addiu at,at,1000
-[ ]*26c: R_MIPS_LO16 \.text
-0+0270 <[^>]*> jr at
-0+0274 <[^>]*> nop
-0+0278 <[^>]*> move a2,a3
-0+027c <[^>]*> move v0,a0
-0+0280 <[^>]*> b 00000000 <foo>
-0+0284 <[^>]*> nop
-0+0288 <[^>]*> move a2,a3
-0+028c <[^>]*> move v0,a0
-0+0290 <[^>]*> lw at,2\(gp\)
-[ ]*290: R_MIPS_GOT16 \.text
-0+0294 <[^>]*> nop
-0+0298 <[^>]*> addiu at,at,1000
-[ ]*298: R_MIPS_LO16 \.text
-0+029c <[^>]*> jr at
+0+021c <[^>]*> addiu at,at,992
+[ ]*21c: R_MIPS_LO16 \.text
+0+0220 <[^>]*> jr at
+0+0224 <[^>]*> move v0,a0
+0+0228 <[^>]*> move v0,a0
+0+022c <[^>]*> b 00000000 <foo>
+0+0230 <[^>]*> nop
+0+0234 <[^>]*> move v0,a0
+0+0238 <[^>]*> lw at,2\(gp\)
+[ ]*238: R_MIPS_GOT16 \.text
+0+023c <[^>]*> nop
+0+0240 <[^>]*> addiu at,at,992
+[ ]*240: R_MIPS_LO16 \.text
+0+0244 <[^>]*> jr at
+0+0248 <[^>]*> nop
+0+024c <[^>]*> move v0,a0
+0+0250 <[^>]*> b 00000000 <foo>
+0+0254 <[^>]*> nop
+0+0258 <[^>]*> move v0,a0
+0+025c <[^>]*> lw at,2\(gp\)
+[ ]*25c: R_MIPS_GOT16 \.text
+0+0260 <[^>]*> nop
+0+0264 <[^>]*> addiu at,at,992
+[ ]*264: R_MIPS_LO16 \.text
+0+0268 <[^>]*> jr at
+0+026c <[^>]*> nop
+0+0270 <[^>]*> move a2,a3
+0+0274 <[^>]*> move v0,a0
+0+0278 <[^>]*> b 00000000 <foo>
+0+027c <[^>]*> nop
+0+0280 <[^>]*> move a2,a3
+0+0284 <[^>]*> move v0,a0
+0+0288 <[^>]*> lw at,2\(gp\)
+[ ]*288: R_MIPS_GOT16 \.text
+0+028c <[^>]*> nop
+0+0290 <[^>]*> addiu at,at,992
+[ ]*290: R_MIPS_LO16 \.text
+0+0294 <[^>]*> jr at
+0+0298 <[^>]*> nop
+0+029c <[^>]*> lw at,0\(gp\)
+[ ]*29c: R_MIPS_GOT16 \.text
0+02a0 <[^>]*> nop
-0+02a4 <[^>]*> lw at,0\(gp\)
-[ ]*2a4: R_MIPS_GOT16 \.text
-0+02a8 <[^>]*> nop
-0+02ac <[^>]*> addiu at,at,692
-[ ]*2ac: R_MIPS_LO16 \.text
-0+02b0 <[^>]*> sw v0,0\(at\)
-0+02b4 <[^>]*> b 00000000 <foo>
+0+02a4 <[^>]*> addiu at,at,684
+[ ]*2a4: R_MIPS_LO16 \.text
+0+02a8 <[^>]*> sw v0,0\(at\)
+0+02ac <[^>]*> b 00000000 <foo>
+0+02b0 <[^>]*> nop
+0+02b4 <[^>]*> lw at,0\(gp\)
+[ ]*2b4: R_MIPS_GOT16 \.text
0+02b8 <[^>]*> nop
-0+02bc <[^>]*> lw at,0\(gp\)
-[ ]*2bc: R_MIPS_GOT16 \.text
-0+02c0 <[^>]*> nop
-0+02c4 <[^>]*> addiu at,at,716
-[ ]*2c4: R_MIPS_LO16 \.text
-0+02c8 <[^>]*> sw v0,0\(at\)
-0+02cc <[^>]*> lw at,2\(gp\)
-[ ]*2cc: R_MIPS_GOT16 \.text
-0+02d0 <[^>]*> nop
-0+02d4 <[^>]*> addiu at,at,1000
-[ ]*2d4: R_MIPS_LO16 \.text
-0+02d8 <[^>]*> jr at
-0+02dc <[^>]*> nop
-0+02e0 <[^>]*> lwc1 \$f0,0\(a0\)
-0+02e4 <[^>]*> b 00000000 <foo>
-0+02e8 <[^>]*> nop
-0+02ec <[^>]*> lwc1 \$f0,0\(a0\)
-0+02f0 <[^>]*> lw at,2\(gp\)
-[ ]*2f0: R_MIPS_GOT16 \.text
-0+02f4 <[^>]*> nop
-0+02f8 <[^>]*> addiu at,at,1000
-[ ]*2f8: R_MIPS_LO16 \.text
-0+02fc <[^>]*> jr at
-0+0300 <[^>]*> nop
-0+0304 <[^>]*> cfc1 v0,\$31
-0+0308 <[^>]*> b 00000000 <foo>
-0+030c <[^>]*> nop
-0+0310 <[^>]*> cfc1 v0,\$31
-0+0314 <[^>]*> lw at,2\(gp\)
-[ ]*314: R_MIPS_GOT16 \.text
-0+0318 <[^>]*> nop
-0+031c <[^>]*> addiu at,at,1000
-[ ]*31c: R_MIPS_LO16 \.text
-0+0320 <[^>]*> jr at
-0+0324 <[^>]*> nop
-0+0328 <[^>]*> ctc1 v0,\$31
-0+032c <[^>]*> b 00000000 <foo>
-0+0330 <[^>]*> nop
-0+0334 <[^>]*> ctc1 v0,\$31
-0+0338 <[^>]*> lw at,2\(gp\)
-[ ]*338: R_MIPS_GOT16 \.text
-0+033c <[^>]*> nop
-0+0340 <[^>]*> addiu at,at,1000
-[ ]*340: R_MIPS_LO16 \.text
-0+0344 <[^>]*> jr at
-0+0348 <[^>]*> nop
-0+034c <[^>]*> mtc1 v0,\$f31
-0+0350 <[^>]*> b 00000000 <foo>
-0+0354 <[^>]*> nop
-0+0358 <[^>]*> mtc1 v0,\$f31
-0+035c <[^>]*> lw at,2\(gp\)
-[ ]*35c: R_MIPS_GOT16 \.text
-0+0360 <[^>]*> nop
-0+0364 <[^>]*> addiu at,at,1000
-[ ]*364: R_MIPS_LO16 \.text
-0+0368 <[^>]*> jr at
-0+036c <[^>]*> nop
-0+0370 <[^>]*> mfhi v0
-0+0374 <[^>]*> b 00000000 <foo>
-0+0378 <[^>]*> nop
-0+037c <[^>]*> mfhi v0
-0+0380 <[^>]*> lw at,2\(gp\)
-[ ]*380: R_MIPS_GOT16 \.text
-0+0384 <[^>]*> nop
-0+0388 <[^>]*> addiu at,at,1000
-[ ]*388: R_MIPS_LO16 \.text
-0+038c <[^>]*> jr at
-0+0390 <[^>]*> nop
-0+0394 <[^>]*> move v0,a0
-0+0398 <[^>]*> jr v0
-0+039c <[^>]*> nop
-0+03a0 <[^>]*> jr a0
-0+03a4 <[^>]*> move v0,a0
-0+03a8 <[^>]*> move v0,a0
-0+03ac <[^>]*> jalr v0
-0+03b0 <[^>]*> nop
-0+03b4 <[^>]*> jalr a0
-0+03b8 <[^>]*> move v0,a0
-0+03bc <[^>]*> move v0,ra
-0+03c0 <[^>]*> jalr v1
-0+03c4 <[^>]*> nop
-0+03c8 <[^>]*> move ra,a0
-0+03cc <[^>]*> jalr a1
-0+03d0 <[^>]*> nop
-0+03d4 <[^>]*> jalr v0,v1
-0+03d8 <[^>]*> move ra,a0
-0+03dc <[^>]*> move v0,ra
-0+03e0 <[^>]*> jalr v0,v1
-0+03e4 <[^>]*> nop
+0+02bc <[^>]*> addiu at,at,708
+[ ]*2bc: R_MIPS_LO16 \.text
+0+02c0 <[^>]*> sw v0,0\(at\)
+0+02c4 <[^>]*> lw at,2\(gp\)
+[ ]*2c4: R_MIPS_GOT16 \.text
+0+02c8 <[^>]*> nop
+0+02cc <[^>]*> addiu at,at,992
+[ ]*2cc: R_MIPS_LO16 \.text
+0+02d0 <[^>]*> jr at
+0+02d4 <[^>]*> nop
+0+02d8 <[^>]*> lwc1 \$f0,0\(a0\)
+0+02dc <[^>]*> b 00000000 <foo>
+0+02e0 <[^>]*> nop
+0+02e4 <[^>]*> lwc1 \$f0,0\(a0\)
+0+02e8 <[^>]*> lw at,2\(gp\)
+[ ]*2e8: R_MIPS_GOT16 \.text
+0+02ec <[^>]*> nop
+0+02f0 <[^>]*> addiu at,at,992
+[ ]*2f0: R_MIPS_LO16 \.text
+0+02f4 <[^>]*> jr at
+0+02f8 <[^>]*> nop
+0+02fc <[^>]*> cfc1 v0,\$31
+0+0300 <[^>]*> b 00000000 <foo>
+0+0304 <[^>]*> nop
+0+0308 <[^>]*> cfc1 v0,\$31
+0+030c <[^>]*> lw at,2\(gp\)
+[ ]*30c: R_MIPS_GOT16 \.text
+0+0310 <[^>]*> nop
+0+0314 <[^>]*> addiu at,at,992
+[ ]*314: R_MIPS_LO16 \.text
+0+0318 <[^>]*> jr at
+0+031c <[^>]*> nop
+0+0320 <[^>]*> ctc1 v0,\$31
+0+0324 <[^>]*> b 00000000 <foo>
+0+0328 <[^>]*> nop
+0+032c <[^>]*> ctc1 v0,\$31
+0+0330 <[^>]*> lw at,2\(gp\)
+[ ]*330: R_MIPS_GOT16 \.text
+0+0334 <[^>]*> nop
+0+0338 <[^>]*> addiu at,at,992
+[ ]*338: R_MIPS_LO16 \.text
+0+033c <[^>]*> jr at
+0+0340 <[^>]*> nop
+0+0344 <[^>]*> mtc1 v0,\$f31
+0+0348 <[^>]*> b 00000000 <foo>
+0+034c <[^>]*> nop
+0+0350 <[^>]*> mtc1 v0,\$f31
+0+0354 <[^>]*> lw at,2\(gp\)
+[ ]*354: R_MIPS_GOT16 \.text
+0+0358 <[^>]*> nop
+0+035c <[^>]*> addiu at,at,992
+[ ]*35c: R_MIPS_LO16 \.text
+0+0360 <[^>]*> jr at
+0+0364 <[^>]*> nop
+0+0368 <[^>]*> mfhi v0
+0+036c <[^>]*> b 00000000 <foo>
+0+0370 <[^>]*> nop
+0+0374 <[^>]*> mfhi v0
+0+0378 <[^>]*> lw at,2\(gp\)
+[ ]*378: R_MIPS_GOT16 \.text
+0+037c <[^>]*> nop
+0+0380 <[^>]*> addiu at,at,992
+[ ]*380: R_MIPS_LO16 \.text
+0+0384 <[^>]*> jr at
+0+0388 <[^>]*> nop
+0+038c <[^>]*> move v0,a0
+0+0390 <[^>]*> jr v0
+0+0394 <[^>]*> nop
+0+0398 <[^>]*> jr a0
+0+039c <[^>]*> move v0,a0
+0+03a0 <[^>]*> move v0,a0
+0+03a4 <[^>]*> jalr v0
+0+03a8 <[^>]*> nop
+0+03ac <[^>]*> jalr a0
+0+03b0 <[^>]*> move v0,a0
+0+03b4 <[^>]*> move v0,ra
+0+03b8 <[^>]*> jalr v1
+0+03bc <[^>]*> nop
+0+03c0 <[^>]*> move ra,a0
+0+03c4 <[^>]*> jalr a1
+0+03c8 <[^>]*> nop
+0+03cc <[^>]*> jalr v0,v1
+0+03d0 <[^>]*> move ra,a0
+0+03d4 <[^>]*> move v0,ra
+0+03d8 <[^>]*> jalr v0,v1
+0+03dc <[^>]*> nop
\.\.\.
\.\.\.
diff -urpN gas.10/testsuite/gas/mips/relax-swap1-mips2.d gas/testsuite/gas/mips/relax-swap1-mips2.d
--- gas.10/testsuite/gas/mips/relax-swap1-mips2.d 2005-02-28 09:24:25.000000000 +0000
+++ gas/testsuite/gas/mips/relax-swap1-mips2.d 2005-03-08 12:48:34.000000000 +0000
@@ -11,7 +11,7 @@ Disassembly of section \.text:
0+0004 <[^>]*> move v0,a0
0+0008 <[^>]*> lw at,2\(gp\)
[ ]*8: R_MIPS_GOT16 \.text
-0+000c <[^>]*> addiu at,at,868
+0+000c <[^>]*> addiu at,at,860
[ ]*c: R_MIPS_LO16 \.text
0+0010 <[^>]*> jr at
0+0014 <[^>]*> move v0,a0
@@ -19,7 +19,7 @@ Disassembly of section \.text:
0+001c <[^>]*> lw v0,0\(a0\)
0+0020 <[^>]*> lw at,2\(gp\)
[ ]*20: R_MIPS_GOT16 \.text
-0+0024 <[^>]*> addiu at,at,868
+0+0024 <[^>]*> addiu at,at,860
[ ]*24: R_MIPS_LO16 \.text
0+0028 <[^>]*> jr at
0+002c <[^>]*> lw v0,0\(a0\)
@@ -27,7 +27,7 @@ Disassembly of section \.text:
0+0034 <[^>]*> sw v0,0\(a0\)
0+0038 <[^>]*> lw at,2\(gp\)
[ ]*38: R_MIPS_GOT16 \.text
-0+003c <[^>]*> addiu at,at,868
+0+003c <[^>]*> addiu at,at,860
[ ]*3c: R_MIPS_LO16 \.text
0+0040 <[^>]*> jr at
0+0044 <[^>]*> sw v0,0\(a0\)
@@ -39,7 +39,7 @@ Disassembly of section \.text:
0+005c <[^>]*> nop
0+0060 <[^>]*> lw at,2\(gp\)
[ ]*60: R_MIPS_GOT16 \.text
-0+0064 <[^>]*> addiu at,at,868
+0+0064 <[^>]*> addiu at,at,860
[ ]*64: R_MIPS_LO16 \.text
0+0068 <[^>]*> jr at
0+006c <[^>]*> nop
@@ -49,7 +49,7 @@ Disassembly of section \.text:
0+007c <[^>]*> nop
0+0080 <[^>]*> lw at,2\(gp\)
[ ]*80: R_MIPS_GOT16 \.text
-0+0084 <[^>]*> addiu at,at,868
+0+0084 <[^>]*> addiu at,at,860
[ ]*84: R_MIPS_LO16 \.text
0+0088 <[^>]*> jr at
0+008c <[^>]*> move v0,a0
@@ -61,7 +61,7 @@ Disassembly of section \.text:
0+00a4 <[^>]*> nop
0+00a8 <[^>]*> lw at,2\(gp\)
[ ]*a8: R_MIPS_GOT16 \.text
-0+00ac <[^>]*> addiu at,at,868
+0+00ac <[^>]*> addiu at,at,860
[ ]*ac: R_MIPS_LO16 \.text
0+00b0 <[^>]*> jr at
0+00b4 <[^>]*> nop
@@ -71,7 +71,7 @@ Disassembly of section \.text:
0+00c4 <[^>]*> nop
0+00c8 <[^>]*> lw at,2\(gp\)
[ ]*c8: R_MIPS_GOT16 \.text
-0+00cc <[^>]*> addiu at,at,868
+0+00cc <[^>]*> addiu at,at,860
[ ]*cc: R_MIPS_LO16 \.text
0+00d0 <[^>]*> jr at
0+00d4 <[^>]*> addiu v0,a0,1
@@ -83,7 +83,7 @@ Disassembly of section \.text:
0+00ec <[^>]*> nop
0+00f0 <[^>]*> lw at,2\(gp\)
[ ]*f0: R_MIPS_GOT16 \.text
-0+00f4 <[^>]*> addiu at,at,868
+0+00f4 <[^>]*> addiu at,at,860
[ ]*f4: R_MIPS_LO16 \.text
0+00f8 <[^>]*> jr at
0+00fc <[^>]*> nop
@@ -93,7 +93,7 @@ Disassembly of section \.text:
0+010c <[^>]*> nop
0+0110 <[^>]*> lw at,2\(gp\)
[ ]*110: R_MIPS_GOT16 \.text
-0+0114 <[^>]*> addiu at,at,868
+0+0114 <[^>]*> addiu at,at,860
[ ]*114: R_MIPS_LO16 \.text
0+0118 <[^>]*> jr at
0+011c <[^>]*> lw v0,0\(a0\)
@@ -103,7 +103,7 @@ Disassembly of section \.text:
0+012c <[^>]*> nop
0+0130 <[^>]*> lw at,2\(gp\)
[ ]*130: R_MIPS_GOT16 \.text
-0+0134 <[^>]*> addiu at,at,868
+0+0134 <[^>]*> addiu at,at,860
[ ]*134: R_MIPS_LO16 \.text
0+0138 <[^>]*> jr at
0+013c <[^>]*> sw v0,0\(a0\)
@@ -113,7 +113,7 @@ Disassembly of section \.text:
0+014c <[^>]*> nop
0+0150 <[^>]*> lw at,2\(gp\)
[ ]*150: R_MIPS_GOT16 \.text
-0+0154 <[^>]*> addiu at,at,868
+0+0154 <[^>]*> addiu at,at,860
[ ]*154: R_MIPS_LO16 \.text
0+0158 <[^>]*> jr at
0+015c <[^>]*> sw v0,0\(a0\)
@@ -127,7 +127,7 @@ Disassembly of section \.text:
0+017c <[^>]*> nop
0+0180 <[^>]*> lw at,2\(gp\)
[ ]*180: R_MIPS_GOT16 \.text
-0+0184 <[^>]*> addiu at,at,868
+0+0184 <[^>]*> addiu at,at,860
[ ]*184: R_MIPS_LO16 \.text
0+0188 <[^>]*> jr at
0+018c <[^>]*> nop
@@ -139,140 +139,138 @@ Disassembly of section \.text:
0+01a4 <[^>]*> nop
0+01a8 <[^>]*> lw at,2\(gp\)
[ ]*1a8: R_MIPS_GOT16 \.text
-0+01ac <[^>]*> addiu at,at,868
+0+01ac <[^>]*> addiu at,at,860
[ ]*1ac: R_MIPS_LO16 \.text
0+01b0 <[^>]*> jr at
0+01b4 <[^>]*> move a2,a3
-0+01b8 <[^>]*> move v0,a0
-0+01bc <[^>]*> bc1t 00000000 <foo>
-0+01c0 <[^>]*> nop
-0+01c4 <[^>]*> move v0,a0
-0+01c8 <[^>]*> bc1f 000001dc <foo\+0x1dc>
-0+01cc <[^>]*> nop
-0+01d0 <[^>]*> lw at,2\(gp\)
-[ ]*1d0: R_MIPS_GOT16 \.text
-0+01d4 <[^>]*> addiu at,at,868
-[ ]*1d4: R_MIPS_LO16 \.text
-0+01d8 <[^>]*> jr at
-0+01dc <[^>]*> nop
-0+01e0 <[^>]*> move v0,a0
-0+01e4 <[^>]*> b 00000000 <foo>
-0+01e8 <[^>]*> nop
-0+01ec <[^>]*> move v0,a0
-0+01f0 <[^>]*> lw at,2\(gp\)
-[ ]*1f0: R_MIPS_GOT16 \.text
-0+01f4 <[^>]*> addiu at,at,868
-[ ]*1f4: R_MIPS_LO16 \.text
-0+01f8 <[^>]*> jr at
-0+01fc <[^>]*> nop
-0+0200 <[^>]*> move v0,a0
-0+0204 <[^>]*> b 00000000 <foo>
-0+0208 <[^>]*> nop
-0+020c <[^>]*> move v0,a0
-0+0210 <[^>]*> lw at,2\(gp\)
-[ ]*210: R_MIPS_GOT16 \.text
-0+0214 <[^>]*> addiu at,at,868
-[ ]*214: R_MIPS_LO16 \.text
-0+0218 <[^>]*> jr at
-0+021c <[^>]*> nop
-0+0220 <[^>]*> move a2,a3
-0+0224 <[^>]*> move v0,a0
-0+0228 <[^>]*> b 00000000 <foo>
-0+022c <[^>]*> nop
-0+0230 <[^>]*> move a2,a3
-0+0234 <[^>]*> move v0,a0
-0+0238 <[^>]*> lw at,2\(gp\)
-[ ]*238: R_MIPS_GOT16 \.text
-0+023c <[^>]*> addiu at,at,868
-[ ]*23c: R_MIPS_LO16 \.text
-0+0240 <[^>]*> jr at
-0+0244 <[^>]*> nop
-0+0248 <[^>]*> lw at,0\(gp\)
-[ ]*248: R_MIPS_GOT16 \.text
-0+024c <[^>]*> addiu at,at,596
-[ ]*24c: R_MIPS_LO16 \.text
-0+0250 <[^>]*> sw v0,0\(at\)
-0+0254 <[^>]*> b 00000000 <foo>
-0+0258 <[^>]*> nop
-0+025c <[^>]*> lw at,0\(gp\)
-[ ]*25c: R_MIPS_GOT16 \.text
-0+0260 <[^>]*> addiu at,at,616
-[ ]*260: R_MIPS_LO16 \.text
-0+0264 <[^>]*> sw v0,0\(at\)
-0+0268 <[^>]*> lw at,2\(gp\)
-[ ]*268: R_MIPS_GOT16 \.text
-0+026c <[^>]*> addiu at,at,868
-[ ]*26c: R_MIPS_LO16 \.text
-0+0270 <[^>]*> jr at
-0+0274 <[^>]*> nop
-0+0278 <[^>]*> b 00000000 <foo>
-0+027c <[^>]*> lwc1 \$f0,0\(a0\)
-0+0280 <[^>]*> lw at,2\(gp\)
-[ ]*280: R_MIPS_GOT16 \.text
-0+0284 <[^>]*> addiu at,at,868
-[ ]*284: R_MIPS_LO16 \.text
-0+0288 <[^>]*> jr at
-0+028c <[^>]*> lwc1 \$f0,0\(a0\)
-0+0290 <[^>]*> cfc1 v0,\$31
-0+0294 <[^>]*> b 00000000 <foo>
-0+0298 <[^>]*> nop
-0+029c <[^>]*> cfc1 v0,\$31
-0+02a0 <[^>]*> lw at,2\(gp\)
-[ ]*2a0: R_MIPS_GOT16 \.text
-0+02a4 <[^>]*> addiu at,at,868
-[ ]*2a4: R_MIPS_LO16 \.text
-0+02a8 <[^>]*> jr at
-0+02ac <[^>]*> nop
-0+02b0 <[^>]*> ctc1 v0,\$31
-0+02b4 <[^>]*> b 00000000 <foo>
-0+02b8 <[^>]*> nop
-0+02bc <[^>]*> ctc1 v0,\$31
-0+02c0 <[^>]*> lw at,2\(gp\)
-[ ]*2c0: R_MIPS_GOT16 \.text
-0+02c4 <[^>]*> addiu at,at,868
-[ ]*2c4: R_MIPS_LO16 \.text
-0+02c8 <[^>]*> jr at
-0+02cc <[^>]*> nop
-0+02d0 <[^>]*> mtc1 v0,\$f31
-0+02d4 <[^>]*> b 00000000 <foo>
-0+02d8 <[^>]*> nop
-0+02dc <[^>]*> mtc1 v0,\$f31
-0+02e0 <[^>]*> lw at,2\(gp\)
-[ ]*2e0: R_MIPS_GOT16 \.text
-0+02e4 <[^>]*> addiu at,at,868
-[ ]*2e4: R_MIPS_LO16 \.text
-0+02e8 <[^>]*> jr at
-0+02ec <[^>]*> nop
-0+02f0 <[^>]*> mfhi v0
-0+02f4 <[^>]*> b 00000000 <foo>
-0+02f8 <[^>]*> nop
-0+02fc <[^>]*> mfhi v0
-0+0300 <[^>]*> lw at,2\(gp\)
-[ ]*300: R_MIPS_GOT16 \.text
-0+0304 <[^>]*> addiu at,at,868
-[ ]*304: R_MIPS_LO16 \.text
-0+0308 <[^>]*> jr at
-0+030c <[^>]*> nop
-0+0310 <[^>]*> move v0,a0
-0+0314 <[^>]*> jr v0
-0+0318 <[^>]*> nop
-0+031c <[^>]*> jr a0
-0+0320 <[^>]*> move v0,a0
-0+0324 <[^>]*> move v0,a0
-0+0328 <[^>]*> jalr v0
-0+032c <[^>]*> nop
-0+0330 <[^>]*> jalr a0
-0+0334 <[^>]*> move v0,a0
-0+0338 <[^>]*> move v0,ra
-0+033c <[^>]*> jalr v1
-0+0340 <[^>]*> nop
-0+0344 <[^>]*> move ra,a0
-0+0348 <[^>]*> jalr a1
-0+034c <[^>]*> nop
-0+0350 <[^>]*> jalr v0,v1
-0+0354 <[^>]*> move ra,a0
-0+0358 <[^>]*> move v0,ra
-0+035c <[^>]*> jalr v0,v1
-0+0360 <[^>]*> nop
+0+01b8 <[^>]*> bc1t 00000000 <foo>
+0+01bc <[^>]*> move v0,a0
+0+01c0 <[^>]*> bc1f 000001d4 <foo\+0x1d4>
+0+01c4 <[^>]*> nop
+0+01c8 <[^>]*> lw at,2\(gp\)
+[ ]*1c8: R_MIPS_GOT16 \.text
+0+01cc <[^>]*> addiu at,at,860
+[ ]*1cc: R_MIPS_LO16 \.text
+0+01d0 <[^>]*> jr at
+0+01d4 <[^>]*> move v0,a0
+0+01d8 <[^>]*> move v0,a0
+0+01dc <[^>]*> b 00000000 <foo>
+0+01e0 <[^>]*> nop
+0+01e4 <[^>]*> move v0,a0
+0+01e8 <[^>]*> lw at,2\(gp\)
+[ ]*1e8: R_MIPS_GOT16 \.text
+0+01ec <[^>]*> addiu at,at,860
+[ ]*1ec: R_MIPS_LO16 \.text
+0+01f0 <[^>]*> jr at
+0+01f4 <[^>]*> nop
+0+01f8 <[^>]*> move v0,a0
+0+01fc <[^>]*> b 00000000 <foo>
+0+0200 <[^>]*> nop
+0+0204 <[^>]*> move v0,a0
+0+0208 <[^>]*> lw at,2\(gp\)
+[ ]*208: R_MIPS_GOT16 \.text
+0+020c <[^>]*> addiu at,at,860
+[ ]*20c: R_MIPS_LO16 \.text
+0+0210 <[^>]*> jr at
+0+0214 <[^>]*> nop
+0+0218 <[^>]*> move a2,a3
+0+021c <[^>]*> move v0,a0
+0+0220 <[^>]*> b 00000000 <foo>
+0+0224 <[^>]*> nop
+0+0228 <[^>]*> move a2,a3
+0+022c <[^>]*> move v0,a0
+0+0230 <[^>]*> lw at,2\(gp\)
+[ ]*230: R_MIPS_GOT16 \.text
+0+0234 <[^>]*> addiu at,at,860
+[ ]*234: R_MIPS_LO16 \.text
+0+0238 <[^>]*> jr at
+0+023c <[^>]*> nop
+0+0240 <[^>]*> lw at,0\(gp\)
+[ ]*240: R_MIPS_GOT16 \.text
+0+0244 <[^>]*> addiu at,at,588
+[ ]*244: R_MIPS_LO16 \.text
+0+0248 <[^>]*> sw v0,0\(at\)
+0+024c <[^>]*> b 00000000 <foo>
+0+0250 <[^>]*> nop
+0+0254 <[^>]*> lw at,0\(gp\)
+[ ]*254: R_MIPS_GOT16 \.text
+0+0258 <[^>]*> addiu at,at,608
+[ ]*258: R_MIPS_LO16 \.text
+0+025c <[^>]*> sw v0,0\(at\)
+0+0260 <[^>]*> lw at,2\(gp\)
+[ ]*260: R_MIPS_GOT16 \.text
+0+0264 <[^>]*> addiu at,at,860
+[ ]*264: R_MIPS_LO16 \.text
+0+0268 <[^>]*> jr at
+0+026c <[^>]*> nop
+0+0270 <[^>]*> b 00000000 <foo>
+0+0274 <[^>]*> lwc1 \$f0,0\(a0\)
+0+0278 <[^>]*> lw at,2\(gp\)
+[ ]*278: R_MIPS_GOT16 \.text
+0+027c <[^>]*> addiu at,at,860
+[ ]*27c: R_MIPS_LO16 \.text
+0+0280 <[^>]*> jr at
+0+0284 <[^>]*> lwc1 \$f0,0\(a0\)
+0+0288 <[^>]*> cfc1 v0,\$31
+0+028c <[^>]*> b 00000000 <foo>
+0+0290 <[^>]*> nop
+0+0294 <[^>]*> cfc1 v0,\$31
+0+0298 <[^>]*> lw at,2\(gp\)
+[ ]*298: R_MIPS_GOT16 \.text
+0+029c <[^>]*> addiu at,at,860
+[ ]*29c: R_MIPS_LO16 \.text
+0+02a0 <[^>]*> jr at
+0+02a4 <[^>]*> nop
+0+02a8 <[^>]*> ctc1 v0,\$31
+0+02ac <[^>]*> b 00000000 <foo>
+0+02b0 <[^>]*> nop
+0+02b4 <[^>]*> ctc1 v0,\$31
+0+02b8 <[^>]*> lw at,2\(gp\)
+[ ]*2b8: R_MIPS_GOT16 \.text
+0+02bc <[^>]*> addiu at,at,860
+[ ]*2bc: R_MIPS_LO16 \.text
+0+02c0 <[^>]*> jr at
+0+02c4 <[^>]*> nop
+0+02c8 <[^>]*> mtc1 v0,\$f31
+0+02cc <[^>]*> b 00000000 <foo>
+0+02d0 <[^>]*> nop
+0+02d4 <[^>]*> mtc1 v0,\$f31
+0+02d8 <[^>]*> lw at,2\(gp\)
+[ ]*2d8: R_MIPS_GOT16 \.text
+0+02dc <[^>]*> addiu at,at,860
+[ ]*2dc: R_MIPS_LO16 \.text
+0+02e0 <[^>]*> jr at
+0+02e4 <[^>]*> nop
+0+02e8 <[^>]*> mfhi v0
+0+02ec <[^>]*> b 00000000 <foo>
+0+02f0 <[^>]*> nop
+0+02f4 <[^>]*> mfhi v0
+0+02f8 <[^>]*> lw at,2\(gp\)
+[ ]*2f8: R_MIPS_GOT16 \.text
+0+02fc <[^>]*> addiu at,at,860
+[ ]*2fc: R_MIPS_LO16 \.text
+0+0300 <[^>]*> jr at
+0+0304 <[^>]*> nop
+0+0308 <[^>]*> move v0,a0
+0+030c <[^>]*> jr v0
+0+0310 <[^>]*> nop
+0+0314 <[^>]*> jr a0
+0+0318 <[^>]*> move v0,a0
+0+031c <[^>]*> move v0,a0
+0+0320 <[^>]*> jalr v0
+0+0324 <[^>]*> nop
+0+0328 <[^>]*> jalr a0
+0+032c <[^>]*> move v0,a0
+0+0330 <[^>]*> move v0,ra
+0+0334 <[^>]*> jalr v1
+0+0338 <[^>]*> nop
+0+033c <[^>]*> move ra,a0
+0+0340 <[^>]*> jalr a1
+0+0344 <[^>]*> nop
+0+0348 <[^>]*> jalr v0,v1
+0+034c <[^>]*> move ra,a0
+0+0350 <[^>]*> move v0,ra
+0+0354 <[^>]*> jalr v0,v1
+0+0358 <[^>]*> nop
\.\.\.
\.\.\.