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Hi Guys, I am applying the attached patch to update tc-arm.c to ISO C90. Cheers Nick PS. Apologies to Paul Brook - since this patch is going to interfere with his recently posted patch. I will take care of this issue. 2004-09-30 Nick Clifton <nickc@redhat.com> * config/tc-arm.c: Use ISO C90 formatting.
Index: gas/config/tc-arm.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-arm.c,v
retrieving revision 1.178
diff -c -3 -p -r1.178 tc-arm.c
*** gas/config/tc-arm.c 30 Sep 2004 13:18:53 -0000 1.178
--- gas/config/tc-arm.c 30 Sep 2004 15:38:20 -0000
*************** static const struct reg_entry mav_dspsc_
*** 709,718 ****
struct reg_map
{
! const struct reg_entry *names;
! int max_regno;
! struct hash_control *htab;
! const char *expected;
};
struct reg_map all_reg_maps[] =
--- 709,718 ----
struct reg_map
{
! const struct reg_entry * names;
! int max_regno;
! struct hash_control * htab;
! const char * expected;
};
struct reg_map all_reg_maps[] =
*************** enum arm_reg_type
*** 753,1040 ****
REG_TYPE_MAX = 13
};
- /* Functions called by parser. */
- /* ARM instructions. */
- static void do_arit PARAMS ((char *));
- static void do_cmp PARAMS ((char *));
- static void do_mov PARAMS ((char *));
- static void do_ldst PARAMS ((char *));
- static void do_ldstt PARAMS ((char *));
- static void do_ldmstm PARAMS ((char *));
- static void do_branch PARAMS ((char *));
- static void do_swi PARAMS ((char *));
-
- /* Pseudo Op codes. */
- static void do_adr PARAMS ((char *));
- static void do_adrl PARAMS ((char *));
- static void do_empty PARAMS ((char *));
-
- /* ARM v2. */
- static void do_mul PARAMS ((char *));
- static void do_mla PARAMS ((char *));
-
- /* ARM v2S. */
- static void do_swap PARAMS ((char *));
-
- /* ARM v3. */
- static void do_msr PARAMS ((char *));
- static void do_mrs PARAMS ((char *));
-
- /* ARM v3M. */
- static void do_mull PARAMS ((char *));
-
- /* ARM v4. */
- static void do_ldstv4 PARAMS ((char *));
-
- /* ARM v4T. */
- static void do_bx PARAMS ((char *));
-
- /* ARM v5T. */
- static void do_blx PARAMS ((char *));
- static void do_bkpt PARAMS ((char *));
- static void do_clz PARAMS ((char *));
- static void do_lstc2 PARAMS ((char *));
- static void do_cdp2 PARAMS ((char *));
- static void do_co_reg2 PARAMS ((char *));
-
- /* ARM v5TExP. */
- static void do_smla PARAMS ((char *));
- static void do_smlal PARAMS ((char *));
- static void do_smul PARAMS ((char *));
- static void do_qadd PARAMS ((char *));
-
- /* ARM v5TE. */
- static void do_pld PARAMS ((char *));
- static void do_ldrd PARAMS ((char *));
- static void do_co_reg2c PARAMS ((char *));
-
- /* ARM v5TEJ. */
- static void do_bxj PARAMS ((char *));
-
- /* ARM V6. */
- static void do_cps PARAMS ((char *));
- static void do_cpsi PARAMS ((char *));
- static void do_ldrex PARAMS ((char *));
- static void do_pkhbt PARAMS ((char *));
- static void do_pkhtb PARAMS ((char *));
- static void do_qadd16 PARAMS ((char *));
- static void do_rev PARAMS ((char *));
- static void do_rfe PARAMS ((char *));
- static void do_sxtah PARAMS ((char *));
- static void do_sxth PARAMS ((char *));
- static void do_setend PARAMS ((char *));
- static void do_smlad PARAMS ((char *));
- static void do_smlald PARAMS ((char *));
- static void do_smmul PARAMS ((char *));
- static void do_ssat PARAMS ((char *));
- static void do_usat PARAMS ((char *));
- static void do_srs PARAMS ((char *));
- static void do_ssat16 PARAMS ((char *));
- static void do_usat16 PARAMS ((char *));
- static void do_strex PARAMS ((char *));
- static void do_umaal PARAMS ((char *));
-
- static void do_cps_mode PARAMS ((char **));
- static void do_cps_flags PARAMS ((char **, int));
- static int do_endian_specifier PARAMS ((char *));
- static void do_pkh_core PARAMS ((char *, int));
- static void do_sat PARAMS ((char **, int));
- static void do_sat16 PARAMS ((char **, int));
-
- /* Coprocessor Instructions. */
- static void do_cdp PARAMS ((char *));
- static void do_lstc PARAMS ((char *));
- static void do_co_reg PARAMS ((char *));
-
- /* FPA instructions. */
- static void do_fpa_ctrl PARAMS ((char *));
- static void do_fpa_ldst PARAMS ((char *));
- static void do_fpa_ldmstm PARAMS ((char *));
- static void do_fpa_dyadic PARAMS ((char *));
- static void do_fpa_monadic PARAMS ((char *));
- static void do_fpa_cmp PARAMS ((char *));
- static void do_fpa_from_reg PARAMS ((char *));
- static void do_fpa_to_reg PARAMS ((char *));
-
- /* VFP instructions. */
- static void do_vfp_sp_monadic PARAMS ((char *));
- static void do_vfp_dp_monadic PARAMS ((char *));
- static void do_vfp_sp_dyadic PARAMS ((char *));
- static void do_vfp_dp_dyadic PARAMS ((char *));
- static void do_vfp_reg_from_sp PARAMS ((char *));
- static void do_vfp_sp_from_reg PARAMS ((char *));
- static void do_vfp_reg2_from_sp2 PARAMS ((char *));
- static void do_vfp_sp2_from_reg2 PARAMS ((char *));
- static void do_vfp_reg_from_dp PARAMS ((char *));
- static void do_vfp_reg2_from_dp PARAMS ((char *));
- static void do_vfp_dp_from_reg PARAMS ((char *));
- static void do_vfp_dp_from_reg2 PARAMS ((char *));
- static void do_vfp_reg_from_ctrl PARAMS ((char *));
- static void do_vfp_ctrl_from_reg PARAMS ((char *));
- static void do_vfp_sp_ldst PARAMS ((char *));
- static void do_vfp_dp_ldst PARAMS ((char *));
- static void do_vfp_sp_ldstmia PARAMS ((char *));
- static void do_vfp_sp_ldstmdb PARAMS ((char *));
- static void do_vfp_dp_ldstmia PARAMS ((char *));
- static void do_vfp_dp_ldstmdb PARAMS ((char *));
- static void do_vfp_xp_ldstmia PARAMS ((char *));
- static void do_vfp_xp_ldstmdb PARAMS ((char *));
- static void do_vfp_sp_compare_z PARAMS ((char *));
- static void do_vfp_dp_compare_z PARAMS ((char *));
- static void do_vfp_dp_sp_cvt PARAMS ((char *));
- static void do_vfp_sp_dp_cvt PARAMS ((char *));
-
- /* XScale. */
- static void do_xsc_mia PARAMS ((char *));
- static void do_xsc_mar PARAMS ((char *));
- static void do_xsc_mra PARAMS ((char *));
-
- /* Maverick. */
- static void do_mav_binops PARAMS ((char *, int, enum arm_reg_type,
- enum arm_reg_type));
- static void do_mav_binops_1a PARAMS ((char *));
- static void do_mav_binops_1b PARAMS ((char *));
- static void do_mav_binops_1c PARAMS ((char *));
- static void do_mav_binops_1d PARAMS ((char *));
- static void do_mav_binops_1e PARAMS ((char *));
- static void do_mav_binops_1f PARAMS ((char *));
- static void do_mav_binops_1g PARAMS ((char *));
- static void do_mav_binops_1h PARAMS ((char *));
- static void do_mav_binops_1i PARAMS ((char *));
- static void do_mav_binops_1j PARAMS ((char *));
- static void do_mav_binops_1k PARAMS ((char *));
- static void do_mav_binops_1l PARAMS ((char *));
- static void do_mav_binops_1m PARAMS ((char *));
- static void do_mav_binops_1n PARAMS ((char *));
- static void do_mav_binops_1o PARAMS ((char *));
- static void do_mav_binops_2a PARAMS ((char *));
- static void do_mav_binops_2b PARAMS ((char *));
- static void do_mav_binops_2c PARAMS ((char *));
- static void do_mav_binops_3a PARAMS ((char *));
- static void do_mav_binops_3b PARAMS ((char *));
- static void do_mav_binops_3c PARAMS ((char *));
- static void do_mav_binops_3d PARAMS ((char *));
- static void do_mav_triple PARAMS ((char *, int, enum arm_reg_type,
- enum arm_reg_type,
- enum arm_reg_type));
- static void do_mav_triple_4a PARAMS ((char *));
- static void do_mav_triple_4b PARAMS ((char *));
- static void do_mav_triple_5a PARAMS ((char *));
- static void do_mav_triple_5b PARAMS ((char *));
- static void do_mav_triple_5c PARAMS ((char *));
- static void do_mav_triple_5d PARAMS ((char *));
- static void do_mav_triple_5e PARAMS ((char *));
- static void do_mav_triple_5f PARAMS ((char *));
- static void do_mav_triple_5g PARAMS ((char *));
- static void do_mav_triple_5h PARAMS ((char *));
- static void do_mav_quad PARAMS ((char *, int, enum arm_reg_type,
- enum arm_reg_type,
- enum arm_reg_type,
- enum arm_reg_type));
- static void do_mav_quad_6a PARAMS ((char *));
- static void do_mav_quad_6b PARAMS ((char *));
- static void do_mav_dspsc_1 PARAMS ((char *));
- static void do_mav_dspsc_2 PARAMS ((char *));
- static void do_mav_shift PARAMS ((char *, enum arm_reg_type,
- enum arm_reg_type));
- static void do_mav_shift_1 PARAMS ((char *));
- static void do_mav_shift_2 PARAMS ((char *));
- static void do_mav_ldst PARAMS ((char *, enum arm_reg_type));
- static void do_mav_ldst_1 PARAMS ((char *));
- static void do_mav_ldst_2 PARAMS ((char *));
- static void do_mav_ldst_3 PARAMS ((char *));
- static void do_mav_ldst_4 PARAMS ((char *));
-
- static int mav_reg_required_here PARAMS ((char **, int,
- enum arm_reg_type));
- static int mav_parse_offset PARAMS ((char **, int *));
-
- static void fix_new_arm PARAMS ((fragS *, int, short, expressionS *,
- int, int));
- static int arm_reg_parse PARAMS ((char **, struct hash_control *));
- static enum arm_reg_type arm_reg_parse_any PARAMS ((char *));
- static const struct asm_psr * arm_psr_parse PARAMS ((char **));
- static void symbol_locate PARAMS ((symbolS *, const char *, segT, valueT,
- fragS *));
- static int add_to_lit_pool PARAMS ((void));
- static unsigned validate_immediate PARAMS ((unsigned));
- static unsigned validate_immediate_twopart PARAMS ((unsigned int,
- unsigned int *));
- static int validate_offset_imm PARAMS ((unsigned int, int));
- static void opcode_select PARAMS ((int));
- static void end_of_line PARAMS ((char *));
- static int reg_required_here PARAMS ((char **, int));
- static int psr_required_here PARAMS ((char **));
- static int co_proc_number PARAMS ((char **));
- static int cp_opc_expr PARAMS ((char **, int, int));
- static int cp_reg_required_here PARAMS ((char **, int));
- static int fp_reg_required_here PARAMS ((char **, int));
- static int vfp_sp_reg_required_here PARAMS ((char **, enum vfp_sp_reg_pos));
- static int vfp_dp_reg_required_here PARAMS ((char **, enum vfp_dp_reg_pos));
- static void vfp_sp_ldstm PARAMS ((char *, enum vfp_ldstm_type));
- static void vfp_dp_ldstm PARAMS ((char *, enum vfp_ldstm_type));
- static long vfp_sp_reg_list PARAMS ((char **, enum vfp_sp_reg_pos));
- static long vfp_dp_reg_list PARAMS ((char **));
- static int vfp_psr_required_here PARAMS ((char **str));
- static const struct vfp_reg *vfp_psr_parse PARAMS ((char **str));
- static int cp_address_offset PARAMS ((char **));
- static int cp_address_required_here PARAMS ((char **, int));
- static int my_get_float_expression PARAMS ((char **));
- static int skip_past_comma PARAMS ((char **));
- static int walk_no_bignums PARAMS ((symbolS *));
- static int negate_data_op PARAMS ((unsigned long *, unsigned long));
- static int data_op2 PARAMS ((char **));
- static int fp_op2 PARAMS ((char **));
- static long reg_list PARAMS ((char **));
- static void thumb_load_store PARAMS ((char *, int, int));
- static int decode_shift PARAMS ((char **, int));
- static int ldst_extend PARAMS ((char **));
- static int ldst_extend_v4 PARAMS ((char **));
- static void thumb_add_sub PARAMS ((char *, int));
- static void insert_reg PARAMS ((const struct reg_entry *,
- struct hash_control *));
- static void thumb_shift PARAMS ((char *, int));
- static void thumb_mov_compare PARAMS ((char *, int));
- static void build_arm_ops_hsh PARAMS ((void));
- static void set_constant_flonums PARAMS ((void));
- static valueT md_chars_to_number PARAMS ((char *, int));
- static void build_reg_hsh PARAMS ((struct reg_map *));
- static void insert_reg_alias PARAMS ((char *, int, struct hash_control *));
- static int create_register_alias PARAMS ((char *, char *));
- static void output_inst PARAMS ((const char *));
- static int accum0_required_here PARAMS ((char **));
- static int ld_mode_required_here PARAMS ((char **));
- static void do_branch25 PARAMS ((char *));
- static symbolS * find_real_start PARAMS ((symbolS *));
- #ifdef OBJ_ELF
- static bfd_reloc_code_real_type arm_parse_reloc PARAMS ((void));
- #endif
-
- static int wreg_required_here PARAMS ((char **, int, enum wreg_type));
- static void do_iwmmxt_byte_addr PARAMS ((char *));
- static void do_iwmmxt_tandc PARAMS ((char *));
- static void do_iwmmxt_tbcst PARAMS ((char *));
- static void do_iwmmxt_textrc PARAMS ((char *));
- static void do_iwmmxt_textrm PARAMS ((char *));
- static void do_iwmmxt_tinsr PARAMS ((char *));
- static void do_iwmmxt_tmcr PARAMS ((char *));
- static void do_iwmmxt_tmcrr PARAMS ((char *));
- static void do_iwmmxt_tmia PARAMS ((char *));
- static void do_iwmmxt_tmovmsk PARAMS ((char *));
- static void do_iwmmxt_tmrc PARAMS ((char *));
- static void do_iwmmxt_tmrrc PARAMS ((char *));
- static void do_iwmmxt_torc PARAMS ((char *));
- static void do_iwmmxt_waligni PARAMS ((char *));
- static void do_iwmmxt_wmov PARAMS ((char *));
- static void do_iwmmxt_word_addr PARAMS ((char *));
- static void do_iwmmxt_wrwr PARAMS ((char *));
- static void do_iwmmxt_wrwrwcg PARAMS ((char *));
- static void do_iwmmxt_wrwrwr PARAMS ((char *));
- static void do_iwmmxt_wshufh PARAMS ((char *));
- static void do_iwmmxt_wzero PARAMS ((char *));
- static int cp_byte_address_offset PARAMS ((char **));
- static int cp_byte_address_required_here PARAMS ((char **));
-
/* ARM instructions take 4bytes in the object file, Thumb instructions
take 2: */
#define INSN_SIZE 4
--- 753,758 ----
*************** struct asm_opcode
*** 1073,2417 ****
unsigned long variant;
/* Function to call to parse args. */
! void (* parms) PARAMS ((char *));
};
! static const struct asm_opcode insns[] =
! {
! /* Core ARM Instructions. */
! {"and", 0xe0000000, 3, ARM_EXT_V1, do_arit},
! {"ands", 0xe0100000, 3, ARM_EXT_V1, do_arit},
! {"eor", 0xe0200000, 3, ARM_EXT_V1, do_arit},
! {"eors", 0xe0300000, 3, ARM_EXT_V1, do_arit},
! {"sub", 0xe0400000, 3, ARM_EXT_V1, do_arit},
! {"subs", 0xe0500000, 3, ARM_EXT_V1, do_arit},
! {"rsb", 0xe0600000, 3, ARM_EXT_V1, do_arit},
! {"rsbs", 0xe0700000, 3, ARM_EXT_V1, do_arit},
! {"add", 0xe0800000, 3, ARM_EXT_V1, do_arit},
! {"adds", 0xe0900000, 3, ARM_EXT_V1, do_arit},
! {"adc", 0xe0a00000, 3, ARM_EXT_V1, do_arit},
! {"adcs", 0xe0b00000, 3, ARM_EXT_V1, do_arit},
! {"sbc", 0xe0c00000, 3, ARM_EXT_V1, do_arit},
! {"sbcs", 0xe0d00000, 3, ARM_EXT_V1, do_arit},
! {"rsc", 0xe0e00000, 3, ARM_EXT_V1, do_arit},
! {"rscs", 0xe0f00000, 3, ARM_EXT_V1, do_arit},
! {"orr", 0xe1800000, 3, ARM_EXT_V1, do_arit},
! {"orrs", 0xe1900000, 3, ARM_EXT_V1, do_arit},
! {"bic", 0xe1c00000, 3, ARM_EXT_V1, do_arit},
! {"bics", 0xe1d00000, 3, ARM_EXT_V1, do_arit},
!
! {"tst", 0xe1100000, 3, ARM_EXT_V1, do_cmp},
! {"tsts", 0xe1100000, 3, ARM_EXT_V1, do_cmp},
! {"tstp", 0xe110f000, 3, ARM_EXT_V1, do_cmp},
! {"teq", 0xe1300000, 3, ARM_EXT_V1, do_cmp},
! {"teqs", 0xe1300000, 3, ARM_EXT_V1, do_cmp},
! {"teqp", 0xe130f000, 3, ARM_EXT_V1, do_cmp},
! {"cmp", 0xe1500000, 3, ARM_EXT_V1, do_cmp},
! {"cmps", 0xe1500000, 3, ARM_EXT_V1, do_cmp},
! {"cmpp", 0xe150f000, 3, ARM_EXT_V1, do_cmp},
! {"cmn", 0xe1700000, 3, ARM_EXT_V1, do_cmp},
! {"cmns", 0xe1700000, 3, ARM_EXT_V1, do_cmp},
! {"cmnp", 0xe170f000, 3, ARM_EXT_V1, do_cmp},
! {"mov", 0xe1a00000, 3, ARM_EXT_V1, do_mov},
! {"movs", 0xe1b00000, 3, ARM_EXT_V1, do_mov},
! {"mvn", 0xe1e00000, 3, ARM_EXT_V1, do_mov},
! {"mvns", 0xe1f00000, 3, ARM_EXT_V1, do_mov},
! {"ldr", 0xe4100000, 3, ARM_EXT_V1, do_ldst},
! {"ldrb", 0xe4500000, 3, ARM_EXT_V1, do_ldst},
! {"ldrt", 0xe4300000, 3, ARM_EXT_V1, do_ldstt},
! {"ldrbt", 0xe4700000, 3, ARM_EXT_V1, do_ldstt},
! {"str", 0xe4000000, 3, ARM_EXT_V1, do_ldst},
! {"strb", 0xe4400000, 3, ARM_EXT_V1, do_ldst},
! {"strt", 0xe4200000, 3, ARM_EXT_V1, do_ldstt},
! {"strbt", 0xe4600000, 3, ARM_EXT_V1, do_ldstt},
! {"stmia", 0xe8800000, 3, ARM_EXT_V1, do_ldmstm},
! {"stmib", 0xe9800000, 3, ARM_EXT_V1, do_ldmstm},
! {"stmda", 0xe8000000, 3, ARM_EXT_V1, do_ldmstm},
! {"stmdb", 0xe9000000, 3, ARM_EXT_V1, do_ldmstm},
! {"stmfd", 0xe9000000, 3, ARM_EXT_V1, do_ldmstm},
! {"stmfa", 0xe9800000, 3, ARM_EXT_V1, do_ldmstm},
! {"stmea", 0xe8800000, 3, ARM_EXT_V1, do_ldmstm},
! {"stmed", 0xe8000000, 3, ARM_EXT_V1, do_ldmstm},
! {"ldmia", 0xe8900000, 3, ARM_EXT_V1, do_ldmstm},
! {"ldmib", 0xe9900000, 3, ARM_EXT_V1, do_ldmstm},
! {"ldmda", 0xe8100000, 3, ARM_EXT_V1, do_ldmstm},
! {"ldmdb", 0xe9100000, 3, ARM_EXT_V1, do_ldmstm},
! {"ldmfd", 0xe8900000, 3, ARM_EXT_V1, do_ldmstm},
! {"ldmfa", 0xe8100000, 3, ARM_EXT_V1, do_ldmstm},
! {"ldmea", 0xe9100000, 3, ARM_EXT_V1, do_ldmstm},
! {"ldmed", 0xe9900000, 3, ARM_EXT_V1, do_ldmstm},
! {"swi", 0xef000000, 3, ARM_EXT_V1, do_swi},
! #ifdef TE_WINCE
! /* XXX This is the wrong place to do this. Think multi-arch. */
! {"bl", 0xeb000000, 2, ARM_EXT_V1, do_branch},
! {"b", 0xea000000, 1, ARM_EXT_V1, do_branch},
! #else
! {"bl", 0xebfffffe, 2, ARM_EXT_V1, do_branch},
! {"b", 0xeafffffe, 1, ARM_EXT_V1, do_branch},
! #endif
! /* Pseudo ops. */
! {"adr", 0xe28f0000, 3, ARM_EXT_V1, do_adr},
! {"adrl", 0xe28f0000, 3, ARM_EXT_V1, do_adrl},
! {"nop", 0xe1a00000, 3, ARM_EXT_V1, do_empty},
! /* ARM 2 multiplies. */
! {"mul", 0xe0000090, 3, ARM_EXT_V2, do_mul},
! {"muls", 0xe0100090, 3, ARM_EXT_V2, do_mul},
! {"mla", 0xe0200090, 3, ARM_EXT_V2, do_mla},
! {"mlas", 0xe0300090, 3, ARM_EXT_V2, do_mla},
! /* Generic coprocessor instructions. */
! {"cdp", 0xee000000, 3, ARM_EXT_V2, do_cdp},
! {"ldc", 0xec100000, 3, ARM_EXT_V2, do_lstc},
! {"ldcl", 0xec500000, 3, ARM_EXT_V2, do_lstc},
! {"stc", 0xec000000, 3, ARM_EXT_V2, do_lstc},
! {"stcl", 0xec400000, 3, ARM_EXT_V2, do_lstc},
! {"mcr", 0xee000010, 3, ARM_EXT_V2, do_co_reg},
! {"mrc", 0xee100010, 3, ARM_EXT_V2, do_co_reg},
! /* ARM 3 - swp instructions. */
! {"swp", 0xe1000090, 3, ARM_EXT_V2S, do_swap},
! {"swpb", 0xe1400090, 3, ARM_EXT_V2S, do_swap},
! /* ARM 6 Status register instructions. */
! {"mrs", 0xe10f0000, 3, ARM_EXT_V3, do_mrs},
! {"msr", 0xe120f000, 3, ARM_EXT_V3, do_msr},
! /* ScottB: our code uses 0xe128f000 for msr.
! NickC: but this is wrong because the bits 16 through 19 are
! handled by the PSR_xxx defines above. */
! /* ARM 7M long multiplies. */
! {"smull", 0xe0c00090, 5, ARM_EXT_V3M, do_mull},
! {"smulls", 0xe0d00090, 5, ARM_EXT_V3M, do_mull},
! {"umull", 0xe0800090, 5, ARM_EXT_V3M, do_mull},
! {"umulls", 0xe0900090, 5, ARM_EXT_V3M, do_mull},
! {"smlal", 0xe0e00090, 5, ARM_EXT_V3M, do_mull},
! {"smlals", 0xe0f00090, 5, ARM_EXT_V3M, do_mull},
! {"umlal", 0xe0a00090, 5, ARM_EXT_V3M, do_mull},
! {"umlals", 0xe0b00090, 5, ARM_EXT_V3M, do_mull},
! /* ARM Architecture 4. */
! {"ldrh", 0xe01000b0, 3, ARM_EXT_V4, do_ldstv4},
! {"ldrsh", 0xe01000f0, 3, ARM_EXT_V4, do_ldstv4},
! {"ldrsb", 0xe01000d0, 3, ARM_EXT_V4, do_ldstv4},
! {"strh", 0xe00000b0, 3, ARM_EXT_V4, do_ldstv4},
! /* ARM Architecture 4T. */
! /* Note: bx (and blx) are required on V5, even if the processor does
! not support Thumb. */
! {"bx", 0xe12fff10, 2, ARM_EXT_V4T | ARM_EXT_V5, do_bx},
! /* ARM Architecture 5T. */
! /* Note: blx has 2 variants, so the .value is set dynamically.
! Only one of the variants has conditional execution. */
! {"blx", 0xe0000000, 3, ARM_EXT_V5, do_blx},
! {"clz", 0xe16f0f10, 3, ARM_EXT_V5, do_clz},
! {"bkpt", 0xe1200070, 0, ARM_EXT_V5, do_bkpt},
! {"ldc2", 0xfc100000, 0, ARM_EXT_V5, do_lstc2},
! {"ldc2l", 0xfc500000, 0, ARM_EXT_V5, do_lstc2},
! {"stc2", 0xfc000000, 0, ARM_EXT_V5, do_lstc2},
! {"stc2l", 0xfc400000, 0, ARM_EXT_V5, do_lstc2},
! {"cdp2", 0xfe000000, 0, ARM_EXT_V5, do_cdp2},
! {"mcr2", 0xfe000010, 0, ARM_EXT_V5, do_co_reg2},
! {"mrc2", 0xfe100010, 0, ARM_EXT_V5, do_co_reg2},
! /* ARM Architecture 5TExP. */
! {"smlabb", 0xe1000080, 6, ARM_EXT_V5ExP, do_smla},
! {"smlatb", 0xe10000a0, 6, ARM_EXT_V5ExP, do_smla},
! {"smlabt", 0xe10000c0, 6, ARM_EXT_V5ExP, do_smla},
! {"smlatt", 0xe10000e0, 6, ARM_EXT_V5ExP, do_smla},
! {"smlawb", 0xe1200080, 6, ARM_EXT_V5ExP, do_smla},
! {"smlawt", 0xe12000c0, 6, ARM_EXT_V5ExP, do_smla},
! {"smlalbb", 0xe1400080, 7, ARM_EXT_V5ExP, do_smlal},
! {"smlaltb", 0xe14000a0, 7, ARM_EXT_V5ExP, do_smlal},
! {"smlalbt", 0xe14000c0, 7, ARM_EXT_V5ExP, do_smlal},
! {"smlaltt", 0xe14000e0, 7, ARM_EXT_V5ExP, do_smlal},
! {"smulbb", 0xe1600080, 6, ARM_EXT_V5ExP, do_smul},
! {"smultb", 0xe16000a0, 6, ARM_EXT_V5ExP, do_smul},
! {"smulbt", 0xe16000c0, 6, ARM_EXT_V5ExP, do_smul},
! {"smultt", 0xe16000e0, 6, ARM_EXT_V5ExP, do_smul},
! {"smulwb", 0xe12000a0, 6, ARM_EXT_V5ExP, do_smul},
! {"smulwt", 0xe12000e0, 6, ARM_EXT_V5ExP, do_smul},
! {"qadd", 0xe1000050, 4, ARM_EXT_V5ExP, do_qadd},
! {"qdadd", 0xe1400050, 5, ARM_EXT_V5ExP, do_qadd},
! {"qsub", 0xe1200050, 4, ARM_EXT_V5ExP, do_qadd},
! {"qdsub", 0xe1600050, 5, ARM_EXT_V5ExP, do_qadd},
!
! /* ARM Architecture 5TE. */
! {"pld", 0xf450f000, 0, ARM_EXT_V5E, do_pld},
! {"ldrd", 0xe00000d0, 3, ARM_EXT_V5E, do_ldrd},
! {"strd", 0xe00000f0, 3, ARM_EXT_V5E, do_ldrd},
!
! {"mcrr", 0xec400000, 4, ARM_EXT_V5E, do_co_reg2c},
! {"mrrc", 0xec500000, 4, ARM_EXT_V5E, do_co_reg2c},
!
! /* ARM Architecture 5TEJ. */
! {"bxj", 0xe12fff20, 3, ARM_EXT_V5J, do_bxj},
!
! /* ARM V6. */
! { "cps", 0xf1020000, 0, ARM_EXT_V6, do_cps},
! { "cpsie", 0xf1080000, 0, ARM_EXT_V6, do_cpsi},
! { "cpsid", 0xf10C0000, 0, ARM_EXT_V6, do_cpsi},
! { "ldrex", 0xe1900f9f, 5, ARM_EXT_V6, do_ldrex},
! { "mcrr2", 0xfc400000, 0, ARM_EXT_V6, do_co_reg2c},
! { "mrrc2", 0xfc500000, 0, ARM_EXT_V6, do_co_reg2c},
! { "pkhbt", 0xe6800010, 5, ARM_EXT_V6, do_pkhbt},
! { "pkhtb", 0xe6800050, 5, ARM_EXT_V6, do_pkhtb},
! { "qadd16", 0xe6200f10, 6, ARM_EXT_V6, do_qadd16},
! { "qadd8", 0xe6200f90, 5, ARM_EXT_V6, do_qadd16},
! { "qaddsubx", 0xe6200f30, 8, ARM_EXT_V6, do_qadd16},
! { "qsub16", 0xe6200f70, 6, ARM_EXT_V6, do_qadd16},
! { "qsub8", 0xe6200ff0, 5, ARM_EXT_V6, do_qadd16},
! { "qsubaddx", 0xe6200f50, 8, ARM_EXT_V6, do_qadd16},
! { "sadd16", 0xe6100f10, 6, ARM_EXT_V6, do_qadd16},
! { "sadd8", 0xe6100f90, 5, ARM_EXT_V6, do_qadd16},
! { "saddsubx", 0xe6100f30, 8, ARM_EXT_V6, do_qadd16},
! { "shadd16", 0xe6300f10, 7, ARM_EXT_V6, do_qadd16},
! { "shadd8", 0xe6300f90, 6, ARM_EXT_V6, do_qadd16},
! { "shaddsubx", 0xe6300f30, 9, ARM_EXT_V6, do_qadd16},
! { "shsub16", 0xe6300f70, 7, ARM_EXT_V6, do_qadd16},
! { "shsub8", 0xe6300ff0, 6, ARM_EXT_V6, do_qadd16},
! { "shsubaddx", 0xe6300f50, 9, ARM_EXT_V6, do_qadd16},
! { "ssub16", 0xe6100f70, 6, ARM_EXT_V6, do_qadd16},
! { "ssub8", 0xe6100ff0, 5, ARM_EXT_V6, do_qadd16},
! { "ssubaddx", 0xe6100f50, 8, ARM_EXT_V6, do_qadd16},
! { "uadd16", 0xe6500f10, 6, ARM_EXT_V6, do_qadd16},
! { "uadd8", 0xe6500f90, 5, ARM_EXT_V6, do_qadd16},
! { "uaddsubx", 0xe6500f30, 8, ARM_EXT_V6, do_qadd16},
! { "uhadd16", 0xe6700f10, 7, ARM_EXT_V6, do_qadd16},
! { "uhadd8", 0xe6700f90, 6, ARM_EXT_V6, do_qadd16},
! { "uhaddsubx", 0xe6700f30, 9, ARM_EXT_V6, do_qadd16},
! { "uhsub16", 0xe6700f70, 7, ARM_EXT_V6, do_qadd16},
! { "uhsub8", 0xe6700ff0, 6, ARM_EXT_V6, do_qadd16},
! { "uhsubaddx", 0xe6700f50, 9, ARM_EXT_V6, do_qadd16},
! { "uqadd16", 0xe6600f10, 7, ARM_EXT_V6, do_qadd16},
! { "uqadd8", 0xe6600f90, 6, ARM_EXT_V6, do_qadd16},
! { "uqaddsubx", 0xe6600f30, 9, ARM_EXT_V6, do_qadd16},
! { "uqsub16", 0xe6600f70, 7, ARM_EXT_V6, do_qadd16},
! { "uqsub8", 0xe6600ff0, 6, ARM_EXT_V6, do_qadd16},
! { "uqsubaddx", 0xe6600f50, 9, ARM_EXT_V6, do_qadd16},
! { "usub16", 0xe6500f70, 6, ARM_EXT_V6, do_qadd16},
! { "usub8", 0xe6500ff0, 5, ARM_EXT_V6, do_qadd16},
! { "usubaddx", 0xe6500f50, 8, ARM_EXT_V6, do_qadd16},
! { "rev", 0xe6bf0f30, 3, ARM_EXT_V6, do_rev},
! { "rev16", 0xe6bf0fb0, 5, ARM_EXT_V6, do_rev},
! { "revsh", 0xe6ff0fb0, 5, ARM_EXT_V6, do_rev},
! { "rfeia", 0xf8900a00, 0, ARM_EXT_V6, do_rfe},
! { "rfeib", 0xf9900a00, 0, ARM_EXT_V6, do_rfe},
! { "rfeda", 0xf8100a00, 0, ARM_EXT_V6, do_rfe},
! { "rfedb", 0xf9100a00, 0, ARM_EXT_V6, do_rfe},
! { "rfefd", 0xf8900a00, 0, ARM_EXT_V6, do_rfe},
! { "rfefa", 0xf9900a00, 0, ARM_EXT_V6, do_rfe},
! { "rfeea", 0xf8100a00, 0, ARM_EXT_V6, do_rfe},
! { "rfeed", 0xf9100a00, 0, ARM_EXT_V6, do_rfe},
! { "sxtah", 0xe6b00070, 5, ARM_EXT_V6, do_sxtah},
! { "sxtab16", 0xe6800070, 7, ARM_EXT_V6, do_sxtah},
! { "sxtab", 0xe6a00070, 5, ARM_EXT_V6, do_sxtah},
! { "sxth", 0xe6bf0070, 4, ARM_EXT_V6, do_sxth},
! { "sxtb16", 0xe68f0070, 6, ARM_EXT_V6, do_sxth},
! { "sxtb", 0xe6af0070, 4, ARM_EXT_V6, do_sxth},
! { "uxtah", 0xe6f00070, 5, ARM_EXT_V6, do_sxtah},
! { "uxtab16", 0xe6c00070, 7, ARM_EXT_V6, do_sxtah},
! { "uxtab", 0xe6e00070, 5, ARM_EXT_V6, do_sxtah},
! { "uxth", 0xe6ff0070, 4, ARM_EXT_V6, do_sxth},
! { "uxtb16", 0xe6cf0070, 6, ARM_EXT_V6, do_sxth},
! { "uxtb", 0xe6ef0070, 4, ARM_EXT_V6, do_sxth},
! { "sel", 0xe68000b0, 3, ARM_EXT_V6, do_qadd16},
! { "setend", 0xf1010000, 0, ARM_EXT_V6, do_setend},
! { "smlad", 0xe7000010, 5, ARM_EXT_V6, do_smlad},
! { "smladx", 0xe7000030, 6, ARM_EXT_V6, do_smlad},
! { "smlald", 0xe7400010, 6, ARM_EXT_V6, do_smlald},
! { "smlaldx", 0xe7400030, 7, ARM_EXT_V6, do_smlald},
! { "smlsd", 0xe7000050, 5, ARM_EXT_V6, do_smlad},
! { "smlsdx", 0xe7000070, 6, ARM_EXT_V6, do_smlad},
! { "smlsld", 0xe7400050, 6, ARM_EXT_V6, do_smlald},
! { "smlsldx", 0xe7400070, 7, ARM_EXT_V6, do_smlald},
! { "smmla", 0xe7500010, 5, ARM_EXT_V6, do_smlad},
! { "smmlar", 0xe7500030, 6, ARM_EXT_V6, do_smlad},
! { "smmls", 0xe75000d0, 5, ARM_EXT_V6, do_smlad},
! { "smmlsr", 0xe75000f0, 6, ARM_EXT_V6, do_smlad},
! { "smmul", 0xe750f010, 5, ARM_EXT_V6, do_smmul},
! { "smmulr", 0xe750f030, 6, ARM_EXT_V6, do_smmul},
! { "smuad", 0xe700f010, 5, ARM_EXT_V6, do_smmul},
! { "smuadx", 0xe700f030, 6, ARM_EXT_V6, do_smmul},
! { "smusd", 0xe700f050, 5, ARM_EXT_V6, do_smmul},
! { "smusdx", 0xe700f070, 6, ARM_EXT_V6, do_smmul},
! { "srsia", 0xf8cd0500, 0, ARM_EXT_V6, do_srs},
! { "srsib", 0xf9cd0500, 0, ARM_EXT_V6, do_srs},
! { "srsda", 0xf84d0500, 0, ARM_EXT_V6, do_srs},
! { "srsdb", 0xf94d0500, 0, ARM_EXT_V6, do_srs},
! { "ssat", 0xe6a00010, 4, ARM_EXT_V6, do_ssat},
! { "ssat16", 0xe6a00f30, 6, ARM_EXT_V6, do_ssat16},
! { "strex", 0xe1800f90, 5, ARM_EXT_V6, do_strex},
! { "umaal", 0xe0400090, 5, ARM_EXT_V6, do_umaal},
! { "usad8", 0xe780f010, 5, ARM_EXT_V6, do_smmul},
! { "usada8", 0xe7800010, 6, ARM_EXT_V6, do_smlad},
! { "usat", 0xe6e00010, 4, ARM_EXT_V6, do_usat},
! { "usat16", 0xe6e00f30, 6, ARM_EXT_V6, do_usat16},
!
! /* Core FPA instruction set (V1). */
! {"wfs", 0xee200110, 3, FPU_FPA_EXT_V1, do_fpa_ctrl},
! {"rfs", 0xee300110, 3, FPU_FPA_EXT_V1, do_fpa_ctrl},
! {"wfc", 0xee400110, 3, FPU_FPA_EXT_V1, do_fpa_ctrl},
! {"rfc", 0xee500110, 3, FPU_FPA_EXT_V1, do_fpa_ctrl},
!
! {"ldfs", 0xec100100, 3, FPU_FPA_EXT_V1, do_fpa_ldst},
! {"ldfd", 0xec108100, 3, FPU_FPA_EXT_V1, do_fpa_ldst},
! {"ldfe", 0xec500100, 3, FPU_FPA_EXT_V1, do_fpa_ldst},
! {"ldfp", 0xec508100, 3, FPU_FPA_EXT_V1, do_fpa_ldst},
!
! {"stfs", 0xec000100, 3, FPU_FPA_EXT_V1, do_fpa_ldst},
! {"stfd", 0xec008100, 3, FPU_FPA_EXT_V1, do_fpa_ldst},
! {"stfe", 0xec400100, 3, FPU_FPA_EXT_V1, do_fpa_ldst},
! {"stfp", 0xec408100, 3, FPU_FPA_EXT_V1, do_fpa_ldst},
!
! {"mvfs", 0xee008100, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"mvfsp", 0xee008120, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"mvfsm", 0xee008140, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"mvfsz", 0xee008160, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"mvfd", 0xee008180, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"mvfdp", 0xee0081a0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"mvfdm", 0xee0081c0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"mvfdz", 0xee0081e0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"mvfe", 0xee088100, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"mvfep", 0xee088120, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"mvfem", 0xee088140, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"mvfez", 0xee088160, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
!
! {"mnfs", 0xee108100, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"mnfsp", 0xee108120, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"mnfsm", 0xee108140, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"mnfsz", 0xee108160, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"mnfd", 0xee108180, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"mnfdp", 0xee1081a0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"mnfdm", 0xee1081c0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"mnfdz", 0xee1081e0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"mnfe", 0xee188100, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"mnfep", 0xee188120, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"mnfem", 0xee188140, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"mnfez", 0xee188160, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
!
! {"abss", 0xee208100, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"abssp", 0xee208120, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"abssm", 0xee208140, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"abssz", 0xee208160, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"absd", 0xee208180, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"absdp", 0xee2081a0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"absdm", 0xee2081c0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"absdz", 0xee2081e0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"abse", 0xee288100, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"absep", 0xee288120, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"absem", 0xee288140, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"absez", 0xee288160, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
!
! {"rnds", 0xee308100, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"rndsp", 0xee308120, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"rndsm", 0xee308140, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"rndsz", 0xee308160, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"rndd", 0xee308180, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"rnddp", 0xee3081a0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"rnddm", 0xee3081c0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"rnddz", 0xee3081e0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"rnde", 0xee388100, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"rndep", 0xee388120, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"rndem", 0xee388140, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"rndez", 0xee388160, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
!
! {"sqts", 0xee408100, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"sqtsp", 0xee408120, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"sqtsm", 0xee408140, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"sqtsz", 0xee408160, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"sqtd", 0xee408180, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"sqtdp", 0xee4081a0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"sqtdm", 0xee4081c0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"sqtdz", 0xee4081e0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"sqte", 0xee488100, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"sqtep", 0xee488120, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"sqtem", 0xee488140, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"sqtez", 0xee488160, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
!
! {"logs", 0xee508100, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"logsp", 0xee508120, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"logsm", 0xee508140, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"logsz", 0xee508160, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"logd", 0xee508180, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"logdp", 0xee5081a0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"logdm", 0xee5081c0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"logdz", 0xee5081e0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"loge", 0xee588100, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"logep", 0xee588120, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"logem", 0xee588140, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"logez", 0xee588160, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
!
! {"lgns", 0xee608100, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"lgnsp", 0xee608120, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"lgnsm", 0xee608140, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"lgnsz", 0xee608160, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"lgnd", 0xee608180, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"lgndp", 0xee6081a0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"lgndm", 0xee6081c0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"lgndz", 0xee6081e0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"lgne", 0xee688100, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"lgnep", 0xee688120, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"lgnem", 0xee688140, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"lgnez", 0xee688160, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
!
! {"exps", 0xee708100, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"expsp", 0xee708120, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"expsm", 0xee708140, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"expsz", 0xee708160, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"expd", 0xee708180, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"expdp", 0xee7081a0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"expdm", 0xee7081c0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"expdz", 0xee7081e0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"expe", 0xee788100, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"expep", 0xee788120, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"expem", 0xee788140, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"expdz", 0xee788160, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
!
! {"sins", 0xee808100, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"sinsp", 0xee808120, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"sinsm", 0xee808140, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"sinsz", 0xee808160, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"sind", 0xee808180, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"sindp", 0xee8081a0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"sindm", 0xee8081c0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"sindz", 0xee8081e0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"sine", 0xee888100, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"sinep", 0xee888120, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"sinem", 0xee888140, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"sinez", 0xee888160, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
!
! {"coss", 0xee908100, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"cossp", 0xee908120, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"cossm", 0xee908140, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"cossz", 0xee908160, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"cosd", 0xee908180, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"cosdp", 0xee9081a0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"cosdm", 0xee9081c0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"cosdz", 0xee9081e0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"cose", 0xee988100, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"cosep", 0xee988120, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"cosem", 0xee988140, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"cosez", 0xee988160, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
!
! {"tans", 0xeea08100, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"tansp", 0xeea08120, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"tansm", 0xeea08140, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"tansz", 0xeea08160, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"tand", 0xeea08180, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"tandp", 0xeea081a0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"tandm", 0xeea081c0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"tandz", 0xeea081e0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"tane", 0xeea88100, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"tanep", 0xeea88120, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"tanem", 0xeea88140, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"tanez", 0xeea88160, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
!
! {"asns", 0xeeb08100, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"asnsp", 0xeeb08120, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"asnsm", 0xeeb08140, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"asnsz", 0xeeb08160, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"asnd", 0xeeb08180, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"asndp", 0xeeb081a0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"asndm", 0xeeb081c0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"asndz", 0xeeb081e0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"asne", 0xeeb88100, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"asnep", 0xeeb88120, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"asnem", 0xeeb88140, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"asnez", 0xeeb88160, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
!
! {"acss", 0xeec08100, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"acssp", 0xeec08120, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"acssm", 0xeec08140, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"acssz", 0xeec08160, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"acsd", 0xeec08180, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"acsdp", 0xeec081a0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"acsdm", 0xeec081c0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"acsdz", 0xeec081e0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"acse", 0xeec88100, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"acsep", 0xeec88120, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"acsem", 0xeec88140, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"acsez", 0xeec88160, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
!
! {"atns", 0xeed08100, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"atnsp", 0xeed08120, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"atnsm", 0xeed08140, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"atnsz", 0xeed08160, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"atnd", 0xeed08180, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"atndp", 0xeed081a0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"atndm", 0xeed081c0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"atndz", 0xeed081e0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"atne", 0xeed88100, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"atnep", 0xeed88120, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"atnem", 0xeed88140, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"atnez", 0xeed88160, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
!
! {"urds", 0xeee08100, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"urdsp", 0xeee08120, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"urdsm", 0xeee08140, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"urdsz", 0xeee08160, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"urdd", 0xeee08180, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"urddp", 0xeee081a0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"urddm", 0xeee081c0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"urddz", 0xeee081e0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"urde", 0xeee88100, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"urdep", 0xeee88120, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"urdem", 0xeee88140, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"urdez", 0xeee88160, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
!
! {"nrms", 0xeef08100, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"nrmsp", 0xeef08120, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"nrmsm", 0xeef08140, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"nrmsz", 0xeef08160, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"nrmd", 0xeef08180, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"nrmdp", 0xeef081a0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"nrmdm", 0xeef081c0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"nrmdz", 0xeef081e0, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"nrme", 0xeef88100, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"nrmep", 0xeef88120, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"nrmem", 0xeef88140, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
! {"nrmez", 0xeef88160, 3, FPU_FPA_EXT_V1, do_fpa_monadic},
!
! {"adfs", 0xee000100, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"adfsp", 0xee000120, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"adfsm", 0xee000140, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"adfsz", 0xee000160, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"adfd", 0xee000180, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"adfdp", 0xee0001a0, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"adfdm", 0xee0001c0, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"adfdz", 0xee0001e0, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"adfe", 0xee080100, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"adfep", 0xee080120, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"adfem", 0xee080140, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"adfez", 0xee080160, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
!
! {"sufs", 0xee200100, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"sufsp", 0xee200120, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"sufsm", 0xee200140, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"sufsz", 0xee200160, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"sufd", 0xee200180, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"sufdp", 0xee2001a0, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"sufdm", 0xee2001c0, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"sufdz", 0xee2001e0, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"sufe", 0xee280100, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"sufep", 0xee280120, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"sufem", 0xee280140, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"sufez", 0xee280160, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
!
! {"rsfs", 0xee300100, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rsfsp", 0xee300120, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rsfsm", 0xee300140, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rsfsz", 0xee300160, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rsfd", 0xee300180, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rsfdp", 0xee3001a0, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rsfdm", 0xee3001c0, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rsfdz", 0xee3001e0, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rsfe", 0xee380100, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rsfep", 0xee380120, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rsfem", 0xee380140, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rsfez", 0xee380160, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
!
! {"mufs", 0xee100100, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"mufsp", 0xee100120, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"mufsm", 0xee100140, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"mufsz", 0xee100160, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"mufd", 0xee100180, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"mufdp", 0xee1001a0, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"mufdm", 0xee1001c0, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"mufdz", 0xee1001e0, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"mufe", 0xee180100, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"mufep", 0xee180120, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"mufem", 0xee180140, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"mufez", 0xee180160, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
!
! {"dvfs", 0xee400100, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"dvfsp", 0xee400120, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"dvfsm", 0xee400140, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"dvfsz", 0xee400160, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"dvfd", 0xee400180, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"dvfdp", 0xee4001a0, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"dvfdm", 0xee4001c0, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"dvfdz", 0xee4001e0, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"dvfe", 0xee480100, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"dvfep", 0xee480120, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"dvfem", 0xee480140, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"dvfez", 0xee480160, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
!
! {"rdfs", 0xee500100, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rdfsp", 0xee500120, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rdfsm", 0xee500140, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rdfsz", 0xee500160, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rdfd", 0xee500180, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rdfdp", 0xee5001a0, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rdfdm", 0xee5001c0, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rdfdz", 0xee5001e0, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rdfe", 0xee580100, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rdfep", 0xee580120, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rdfem", 0xee580140, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rdfez", 0xee580160, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
!
! {"pows", 0xee600100, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"powsp", 0xee600120, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"powsm", 0xee600140, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"powsz", 0xee600160, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"powd", 0xee600180, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"powdp", 0xee6001a0, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"powdm", 0xee6001c0, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"powdz", 0xee6001e0, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"powe", 0xee680100, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"powep", 0xee680120, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"powem", 0xee680140, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"powez", 0xee680160, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
!
! {"rpws", 0xee700100, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rpwsp", 0xee700120, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rpwsm", 0xee700140, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rpwsz", 0xee700160, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rpwd", 0xee700180, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rpwdp", 0xee7001a0, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rpwdm", 0xee7001c0, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rpwdz", 0xee7001e0, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rpwe", 0xee780100, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rpwep", 0xee780120, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rpwem", 0xee780140, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rpwez", 0xee780160, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
!
! {"rmfs", 0xee800100, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rmfsp", 0xee800120, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rmfsm", 0xee800140, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rmfsz", 0xee800160, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rmfd", 0xee800180, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rmfdp", 0xee8001a0, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rmfdm", 0xee8001c0, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rmfdz", 0xee8001e0, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rmfe", 0xee880100, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rmfep", 0xee880120, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rmfem", 0xee880140, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"rmfez", 0xee880160, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
!
! {"fmls", 0xee900100, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"fmlsp", 0xee900120, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"fmlsm", 0xee900140, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"fmlsz", 0xee900160, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"fmld", 0xee900180, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"fmldp", 0xee9001a0, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"fmldm", 0xee9001c0, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"fmldz", 0xee9001e0, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"fmle", 0xee980100, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"fmlep", 0xee980120, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"fmlem", 0xee980140, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"fmlez", 0xee980160, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
!
! {"fdvs", 0xeea00100, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"fdvsp", 0xeea00120, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"fdvsm", 0xeea00140, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"fdvsz", 0xeea00160, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"fdvd", 0xeea00180, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"fdvdp", 0xeea001a0, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"fdvdm", 0xeea001c0, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"fdvdz", 0xeea001e0, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"fdve", 0xeea80100, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"fdvep", 0xeea80120, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"fdvem", 0xeea80140, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"fdvez", 0xeea80160, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
!
! {"frds", 0xeeb00100, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"frdsp", 0xeeb00120, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"frdsm", 0xeeb00140, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"frdsz", 0xeeb00160, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"frdd", 0xeeb00180, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"frddp", 0xeeb001a0, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"frddm", 0xeeb001c0, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"frddz", 0xeeb001e0, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"frde", 0xeeb80100, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"frdep", 0xeeb80120, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"frdem", 0xeeb80140, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"frdez", 0xeeb80160, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
!
! {"pols", 0xeec00100, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"polsp", 0xeec00120, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"polsm", 0xeec00140, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"polsz", 0xeec00160, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"pold", 0xeec00180, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"poldp", 0xeec001a0, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"poldm", 0xeec001c0, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"poldz", 0xeec001e0, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"pole", 0xeec80100, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"polep", 0xeec80120, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"polem", 0xeec80140, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
! {"polez", 0xeec80160, 3, FPU_FPA_EXT_V1, do_fpa_dyadic},
!
! {"cmf", 0xee90f110, 3, FPU_FPA_EXT_V1, do_fpa_cmp},
! {"cmfe", 0xeed0f110, 3, FPU_FPA_EXT_V1, do_fpa_cmp},
! {"cnf", 0xeeb0f110, 3, FPU_FPA_EXT_V1, do_fpa_cmp},
! {"cnfe", 0xeef0f110, 3, FPU_FPA_EXT_V1, do_fpa_cmp},
! /* The FPA10 data sheet suggests that the 'E' of cmfe/cnfe should
! not be an optional suffix, but part of the instruction. To be
! compatible, we accept either. */
! {"cmfe", 0xeed0f110, 4, FPU_FPA_EXT_V1, do_fpa_cmp},
! {"cnfe", 0xeef0f110, 4, FPU_FPA_EXT_V1, do_fpa_cmp},
!
! {"flts", 0xee000110, 3, FPU_FPA_EXT_V1, do_fpa_from_reg},
! {"fltsp", 0xee000130, 3, FPU_FPA_EXT_V1, do_fpa_from_reg},
! {"fltsm", 0xee000150, 3, FPU_FPA_EXT_V1, do_fpa_from_reg},
! {"fltsz", 0xee000170, 3, FPU_FPA_EXT_V1, do_fpa_from_reg},
! {"fltd", 0xee000190, 3, FPU_FPA_EXT_V1, do_fpa_from_reg},
! {"fltdp", 0xee0001b0, 3, FPU_FPA_EXT_V1, do_fpa_from_reg},
! {"fltdm", 0xee0001d0, 3, FPU_FPA_EXT_V1, do_fpa_from_reg},
! {"fltdz", 0xee0001f0, 3, FPU_FPA_EXT_V1, do_fpa_from_reg},
! {"flte", 0xee080110, 3, FPU_FPA_EXT_V1, do_fpa_from_reg},
! {"fltep", 0xee080130, 3, FPU_FPA_EXT_V1, do_fpa_from_reg},
! {"fltem", 0xee080150, 3, FPU_FPA_EXT_V1, do_fpa_from_reg},
! {"fltez", 0xee080170, 3, FPU_FPA_EXT_V1, do_fpa_from_reg},
!
! /* The implementation of the FIX instruction is broken on some
! assemblers, in that it accepts a precision specifier as well as a
! rounding specifier, despite the fact that this is meaningless.
! To be more compatible, we accept it as well, though of course it
! does not set any bits. */
! {"fix", 0xee100110, 3, FPU_FPA_EXT_V1, do_fpa_to_reg},
! {"fixp", 0xee100130, 3, FPU_FPA_EXT_V1, do_fpa_to_reg},
! {"fixm", 0xee100150, 3, FPU_FPA_EXT_V1, do_fpa_to_reg},
! {"fixz", 0xee100170, 3, FPU_FPA_EXT_V1, do_fpa_to_reg},
! {"fixsp", 0xee100130, 3, FPU_FPA_EXT_V1, do_fpa_to_reg},
! {"fixsm", 0xee100150, 3, FPU_FPA_EXT_V1, do_fpa_to_reg},
! {"fixsz", 0xee100170, 3, FPU_FPA_EXT_V1, do_fpa_to_reg},
! {"fixdp", 0xee100130, 3, FPU_FPA_EXT_V1, do_fpa_to_reg},
! {"fixdm", 0xee100150, 3, FPU_FPA_EXT_V1, do_fpa_to_reg},
! {"fixdz", 0xee100170, 3, FPU_FPA_EXT_V1, do_fpa_to_reg},
! {"fixep", 0xee100130, 3, FPU_FPA_EXT_V1, do_fpa_to_reg},
! {"fixem", 0xee100150, 3, FPU_FPA_EXT_V1, do_fpa_to_reg},
! {"fixez", 0xee100170, 3, FPU_FPA_EXT_V1, do_fpa_to_reg},
!
! /* Instructions that were new with the real FPA, call them V2. */
! {"lfm", 0xec100200, 3, FPU_FPA_EXT_V2, do_fpa_ldmstm},
! {"lfmfd", 0xec900200, 3, FPU_FPA_EXT_V2, do_fpa_ldmstm},
! {"lfmea", 0xed100200, 3, FPU_FPA_EXT_V2, do_fpa_ldmstm},
! {"sfm", 0xec000200, 3, FPU_FPA_EXT_V2, do_fpa_ldmstm},
! {"sfmfd", 0xed000200, 3, FPU_FPA_EXT_V2, do_fpa_ldmstm},
! {"sfmea", 0xec800200, 3, FPU_FPA_EXT_V2, do_fpa_ldmstm},
!
! /* VFP V1xD (single precision). */
! /* Moves and type conversions. */
! {"fcpys", 0xeeb00a40, 5, FPU_VFP_EXT_V1xD, do_vfp_sp_monadic},
! {"fmrs", 0xee100a10, 4, FPU_VFP_EXT_V1xD, do_vfp_reg_from_sp},
! {"fmsr", 0xee000a10, 4, FPU_VFP_EXT_V1xD, do_vfp_sp_from_reg},
! {"fmstat", 0xeef1fa10, 6, FPU_VFP_EXT_V1xD, do_empty},
! {"fsitos", 0xeeb80ac0, 6, FPU_VFP_EXT_V1xD, do_vfp_sp_monadic},
! {"fuitos", 0xeeb80a40, 6, FPU_VFP_EXT_V1xD, do_vfp_sp_monadic},
! {"ftosis", 0xeebd0a40, 6, FPU_VFP_EXT_V1xD, do_vfp_sp_monadic},
! {"ftosizs", 0xeebd0ac0, 7, FPU_VFP_EXT_V1xD, do_vfp_sp_monadic},
! {"ftouis", 0xeebc0a40, 6, FPU_VFP_EXT_V1xD, do_vfp_sp_monadic},
! {"ftouizs", 0xeebc0ac0, 7, FPU_VFP_EXT_V1xD, do_vfp_sp_monadic},
! {"fmrx", 0xeef00a10, 4, FPU_VFP_EXT_V1xD, do_vfp_reg_from_ctrl},
! {"fmxr", 0xeee00a10, 4, FPU_VFP_EXT_V1xD, do_vfp_ctrl_from_reg},
!
! /* Memory operations. */
! {"flds", 0xed100a00, 4, FPU_VFP_EXT_V1xD, do_vfp_sp_ldst},
! {"fsts", 0xed000a00, 4, FPU_VFP_EXT_V1xD, do_vfp_sp_ldst},
! {"fldmias", 0xec900a00, 7, FPU_VFP_EXT_V1xD, do_vfp_sp_ldstmia},
! {"fldmfds", 0xec900a00, 7, FPU_VFP_EXT_V1xD, do_vfp_sp_ldstmia},
! {"fldmdbs", 0xed300a00, 7, FPU_VFP_EXT_V1xD, do_vfp_sp_ldstmdb},
! {"fldmeas", 0xed300a00, 7, FPU_VFP_EXT_V1xD, do_vfp_sp_ldstmdb},
! {"fldmiax", 0xec900b00, 7, FPU_VFP_EXT_V1xD, do_vfp_xp_ldstmia},
! {"fldmfdx", 0xec900b00, 7, FPU_VFP_EXT_V1xD, do_vfp_xp_ldstmia},
! {"fldmdbx", 0xed300b00, 7, FPU_VFP_EXT_V1xD, do_vfp_xp_ldstmdb},
! {"fldmeax", 0xed300b00, 7, FPU_VFP_EXT_V1xD, do_vfp_xp_ldstmdb},
! {"fstmias", 0xec800a00, 7, FPU_VFP_EXT_V1xD, do_vfp_sp_ldstmia},
! {"fstmeas", 0xec800a00, 7, FPU_VFP_EXT_V1xD, do_vfp_sp_ldstmia},
! {"fstmdbs", 0xed200a00, 7, FPU_VFP_EXT_V1xD, do_vfp_sp_ldstmdb},
! {"fstmfds", 0xed200a00, 7, FPU_VFP_EXT_V1xD, do_vfp_sp_ldstmdb},
! {"fstmiax", 0xec800b00, 7, FPU_VFP_EXT_V1xD, do_vfp_xp_ldstmia},
! {"fstmeax", 0xec800b00, 7, FPU_VFP_EXT_V1xD, do_vfp_xp_ldstmia},
! {"fstmdbx", 0xed200b00, 7, FPU_VFP_EXT_V1xD, do_vfp_xp_ldstmdb},
! {"fstmfdx", 0xed200b00, 7, FPU_VFP_EXT_V1xD, do_vfp_xp_ldstmdb},
!
! /* Monadic operations. */
! {"fabss", 0xeeb00ac0, 5, FPU_VFP_EXT_V1xD, do_vfp_sp_monadic},
! {"fnegs", 0xeeb10a40, 5, FPU_VFP_EXT_V1xD, do_vfp_sp_monadic},
! {"fsqrts", 0xeeb10ac0, 6, FPU_VFP_EXT_V1xD, do_vfp_sp_monadic},
!
! /* Dyadic operations. */
! {"fadds", 0xee300a00, 5, FPU_VFP_EXT_V1xD, do_vfp_sp_dyadic},
! {"fsubs", 0xee300a40, 5, FPU_VFP_EXT_V1xD, do_vfp_sp_dyadic},
! {"fmuls", 0xee200a00, 5, FPU_VFP_EXT_V1xD, do_vfp_sp_dyadic},
! {"fdivs", 0xee800a00, 5, FPU_VFP_EXT_V1xD, do_vfp_sp_dyadic},
! {"fmacs", 0xee000a00, 5, FPU_VFP_EXT_V1xD, do_vfp_sp_dyadic},
! {"fmscs", 0xee100a00, 5, FPU_VFP_EXT_V1xD, do_vfp_sp_dyadic},
! {"fnmuls", 0xee200a40, 6, FPU_VFP_EXT_V1xD, do_vfp_sp_dyadic},
! {"fnmacs", 0xee000a40, 6, FPU_VFP_EXT_V1xD, do_vfp_sp_dyadic},
! {"fnmscs", 0xee100a40, 6, FPU_VFP_EXT_V1xD, do_vfp_sp_dyadic},
!
! /* Comparisons. */
! {"fcmps", 0xeeb40a40, 5, FPU_VFP_EXT_V1xD, do_vfp_sp_monadic},
! {"fcmpzs", 0xeeb50a40, 6, FPU_VFP_EXT_V1xD, do_vfp_sp_compare_z},
! {"fcmpes", 0xeeb40ac0, 6, FPU_VFP_EXT_V1xD, do_vfp_sp_monadic},
! {"fcmpezs", 0xeeb50ac0, 7, FPU_VFP_EXT_V1xD, do_vfp_sp_compare_z},
!
! /* VFP V1 (Double precision). */
! /* Moves and type conversions. */
! {"fcpyd", 0xeeb00b40, 5, FPU_VFP_EXT_V1, do_vfp_dp_monadic},
! {"fcvtds", 0xeeb70ac0, 6, FPU_VFP_EXT_V1, do_vfp_dp_sp_cvt},
! {"fcvtsd", 0xeeb70bc0, 6, FPU_VFP_EXT_V1, do_vfp_sp_dp_cvt},
! {"fmdhr", 0xee200b10, 5, FPU_VFP_EXT_V1, do_vfp_dp_from_reg},
! {"fmdlr", 0xee000b10, 5, FPU_VFP_EXT_V1, do_vfp_dp_from_reg},
! {"fmrdh", 0xee300b10, 5, FPU_VFP_EXT_V1, do_vfp_reg_from_dp},
! {"fmrdl", 0xee100b10, 5, FPU_VFP_EXT_V1, do_vfp_reg_from_dp},
! {"fsitod", 0xeeb80bc0, 6, FPU_VFP_EXT_V1, do_vfp_dp_sp_cvt},
! {"fuitod", 0xeeb80b40, 6, FPU_VFP_EXT_V1, do_vfp_dp_sp_cvt},
! {"ftosid", 0xeebd0b40, 6, FPU_VFP_EXT_V1, do_vfp_sp_dp_cvt},
! {"ftosizd", 0xeebd0bc0, 7, FPU_VFP_EXT_V1, do_vfp_sp_dp_cvt},
! {"ftouid", 0xeebc0b40, 6, FPU_VFP_EXT_V1, do_vfp_sp_dp_cvt},
! {"ftouizd", 0xeebc0bc0, 7, FPU_VFP_EXT_V1, do_vfp_sp_dp_cvt},
!
! /* Memory operations. */
! {"fldd", 0xed100b00, 4, FPU_VFP_EXT_V1, do_vfp_dp_ldst},
! {"fstd", 0xed000b00, 4, FPU_VFP_EXT_V1, do_vfp_dp_ldst},
! {"fldmiad", 0xec900b00, 7, FPU_VFP_EXT_V1, do_vfp_dp_ldstmia},
! {"fldmfdd", 0xec900b00, 7, FPU_VFP_EXT_V1, do_vfp_dp_ldstmia},
! {"fldmdbd", 0xed300b00, 7, FPU_VFP_EXT_V1, do_vfp_dp_ldstmdb},
! {"fldmead", 0xed300b00, 7, FPU_VFP_EXT_V1, do_vfp_dp_ldstmdb},
! {"fstmiad", 0xec800b00, 7, FPU_VFP_EXT_V1, do_vfp_dp_ldstmia},
! {"fstmead", 0xec800b00, 7, FPU_VFP_EXT_V1, do_vfp_dp_ldstmia},
! {"fstmdbd", 0xed200b00, 7, FPU_VFP_EXT_V1, do_vfp_dp_ldstmdb},
! {"fstmfdd", 0xed200b00, 7, FPU_VFP_EXT_V1, do_vfp_dp_ldstmdb},
!
! /* Monadic operations. */
! {"fabsd", 0xeeb00bc0, 5, FPU_VFP_EXT_V1, do_vfp_dp_monadic},
! {"fnegd", 0xeeb10b40, 5, FPU_VFP_EXT_V1, do_vfp_dp_monadic},
! {"fsqrtd", 0xeeb10bc0, 6, FPU_VFP_EXT_V1, do_vfp_dp_monadic},
!
! /* Dyadic operations. */
! {"faddd", 0xee300b00, 5, FPU_VFP_EXT_V1, do_vfp_dp_dyadic},
! {"fsubd", 0xee300b40, 5, FPU_VFP_EXT_V1, do_vfp_dp_dyadic},
! {"fmuld", 0xee200b00, 5, FPU_VFP_EXT_V1, do_vfp_dp_dyadic},
! {"fdivd", 0xee800b00, 5, FPU_VFP_EXT_V1, do_vfp_dp_dyadic},
! {"fmacd", 0xee000b00, 5, FPU_VFP_EXT_V1, do_vfp_dp_dyadic},
! {"fmscd", 0xee100b00, 5, FPU_VFP_EXT_V1, do_vfp_dp_dyadic},
! {"fnmuld", 0xee200b40, 6, FPU_VFP_EXT_V1, do_vfp_dp_dyadic},
! {"fnmacd", 0xee000b40, 6, FPU_VFP_EXT_V1, do_vfp_dp_dyadic},
! {"fnmscd", 0xee100b40, 6, FPU_VFP_EXT_V1, do_vfp_dp_dyadic},
!
! /* Comparisons. */
! {"fcmpd", 0xeeb40b40, 5, FPU_VFP_EXT_V1, do_vfp_dp_monadic},
! {"fcmpzd", 0xeeb50b40, 6, FPU_VFP_EXT_V1, do_vfp_dp_compare_z},
! {"fcmped", 0xeeb40bc0, 6, FPU_VFP_EXT_V1, do_vfp_dp_monadic},
! {"fcmpezd", 0xeeb50bc0, 7, FPU_VFP_EXT_V1, do_vfp_dp_compare_z},
!
! /* VFP V2. */
! {"fmsrr", 0xec400a10, 5, FPU_VFP_EXT_V2, do_vfp_sp2_from_reg2},
! {"fmrrs", 0xec500a10, 5, FPU_VFP_EXT_V2, do_vfp_reg2_from_sp2},
! {"fmdrr", 0xec400b10, 5, FPU_VFP_EXT_V2, do_vfp_dp_from_reg2},
! {"fmrrd", 0xec500b10, 5, FPU_VFP_EXT_V2, do_vfp_reg2_from_dp},
!
! /* Intel XScale extensions to ARM V5 ISA. (All use CP0). */
! {"mia", 0xee200010, 3, ARM_CEXT_XSCALE, do_xsc_mia},
! {"miaph", 0xee280010, 5, ARM_CEXT_XSCALE, do_xsc_mia},
! {"miabb", 0xee2c0010, 5, ARM_CEXT_XSCALE, do_xsc_mia},
! {"miabt", 0xee2d0010, 5, ARM_CEXT_XSCALE, do_xsc_mia},
! {"miatb", 0xee2e0010, 5, ARM_CEXT_XSCALE, do_xsc_mia},
! {"miatt", 0xee2f0010, 5, ARM_CEXT_XSCALE, do_xsc_mia},
! {"mar", 0xec400000, 3, ARM_CEXT_XSCALE, do_xsc_mar},
! {"mra", 0xec500000, 3, ARM_CEXT_XSCALE, do_xsc_mra},
!
! /* Intel Wireless MMX technology instructions. */
! {"tandcb", 0xee130130, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tandc},
! {"tandch", 0xee530130, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tandc},
! {"tandcw", 0xee930130, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tandc},
! {"tbcstb", 0xee400010, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tbcst},
! {"tbcsth", 0xee400050, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tbcst},
! {"tbcstw", 0xee400090, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tbcst},
! {"textrcb", 0xee130170, 7, ARM_CEXT_IWMMXT, do_iwmmxt_textrc},
! {"textrch", 0xee530170, 7, ARM_CEXT_IWMMXT, do_iwmmxt_textrc},
! {"textrcw", 0xee930170, 7, ARM_CEXT_IWMMXT, do_iwmmxt_textrc},
! {"textrmub", 0xee100070, 8, ARM_CEXT_IWMMXT, do_iwmmxt_textrm},
! {"textrmuh", 0xee500070, 8, ARM_CEXT_IWMMXT, do_iwmmxt_textrm},
! {"textrmuw", 0xee900070, 8, ARM_CEXT_IWMMXT, do_iwmmxt_textrm},
! {"textrmsb", 0xee100078, 8, ARM_CEXT_IWMMXT, do_iwmmxt_textrm},
! {"textrmsh", 0xee500078, 8, ARM_CEXT_IWMMXT, do_iwmmxt_textrm},
! {"textrmsw", 0xee900078, 8, ARM_CEXT_IWMMXT, do_iwmmxt_textrm},
! {"tinsrb", 0xee600010, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tinsr},
! {"tinsrh", 0xee600050, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tinsr},
! {"tinsrw", 0xee600090, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tinsr},
! {"tmcr", 0xee000110, 4, ARM_CEXT_IWMMXT, do_iwmmxt_tmcr},
! {"tmcrr", 0xec400000, 5, ARM_CEXT_IWMMXT, do_iwmmxt_tmcrr},
! {"tmia", 0xee200010, 4, ARM_CEXT_IWMMXT, do_iwmmxt_tmia},
! {"tmiaph", 0xee280010, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tmia},
! {"tmiabb", 0xee2c0010, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tmia},
! {"tmiabt", 0xee2d0010, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tmia},
! {"tmiatb", 0xee2e0010, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tmia},
! {"tmiatt", 0xee2f0010, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tmia},
! {"tmovmskb", 0xee100030, 8, ARM_CEXT_IWMMXT, do_iwmmxt_tmovmsk},
! {"tmovmskh", 0xee500030, 8, ARM_CEXT_IWMMXT, do_iwmmxt_tmovmsk},
! {"tmovmskw", 0xee900030, 8, ARM_CEXT_IWMMXT, do_iwmmxt_tmovmsk},
! {"tmrc", 0xee100110, 4, ARM_CEXT_IWMMXT, do_iwmmxt_tmrc},
! {"tmrrc", 0xec500000, 5, ARM_CEXT_IWMMXT, do_iwmmxt_tmrrc},
! {"torcb", 0xee130150, 5, ARM_CEXT_IWMMXT, do_iwmmxt_torc},
! {"torch", 0xee530150, 5, ARM_CEXT_IWMMXT, do_iwmmxt_torc},
! {"torcw", 0xee930150, 5, ARM_CEXT_IWMMXT, do_iwmmxt_torc},
! {"waccb", 0xee0001c0, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
! {"wacch", 0xee4001c0, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
! {"waccw", 0xee8001c0, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
! {"waddbss", 0xee300180, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"waddb", 0xee000180, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"waddbus", 0xee100180, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"waddhss", 0xee700180, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"waddh", 0xee400180, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"waddhus", 0xee500180, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"waddwss", 0xeeb00180, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"waddw", 0xee800180, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"waddwus", 0xee900180, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"waligni", 0xee000020, 7, ARM_CEXT_IWMMXT, do_iwmmxt_waligni},
! {"walignr0", 0xee800020, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"walignr1", 0xee900020, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"walignr2", 0xeea00020, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"walignr3", 0xeeb00020, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wand", 0xee200000, 4, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wandn", 0xee300000, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wavg2b", 0xee800000, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wavg2br", 0xee900000, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wavg2h", 0xeec00000, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wavg2hr", 0xeed00000, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wcmpeqb", 0xee000060, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wcmpeqh", 0xee400060, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wcmpeqw", 0xee800060, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wcmpgtub", 0xee100060, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wcmpgtuh", 0xee500060, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wcmpgtuw", 0xee900060, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wcmpgtsb", 0xee300060, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wcmpgtsh", 0xee700060, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wcmpgtsw", 0xeeb00060, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wldrb", 0xec100000, 5, ARM_CEXT_IWMMXT, do_iwmmxt_byte_addr},
! {"wldrh", 0xec100100, 5, ARM_CEXT_IWMMXT, do_iwmmxt_byte_addr},
! {"wldrw", 0xec100200, 5, ARM_CEXT_IWMMXT, do_iwmmxt_word_addr},
! {"wldrd", 0xec100300, 5, ARM_CEXT_IWMMXT, do_iwmmxt_word_addr},
! {"wmacs", 0xee600100, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wmacsz", 0xee700100, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wmacu", 0xee400100, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wmacuz", 0xee500100, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wmadds", 0xeea00100, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wmaddu", 0xee800100, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wmaxsb", 0xee200160, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wmaxsh", 0xee600160, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wmaxsw", 0xeea00160, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wmaxub", 0xee000160, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wmaxuh", 0xee400160, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wmaxuw", 0xee800160, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wminsb", 0xee300160, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wminsh", 0xee700160, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wminsw", 0xeeb00160, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wminub", 0xee100160, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wminuh", 0xee500160, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wminuw", 0xee900160, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wmov", 0xee000000, 4, ARM_CEXT_IWMMXT, do_iwmmxt_wmov},
! {"wmulsm", 0xee300100, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wmulsl", 0xee200100, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wmulum", 0xee100100, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wmulul", 0xee000100, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wor", 0xee000000, 3, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wpackhss", 0xee700080, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wpackhus", 0xee500080, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wpackwss", 0xeeb00080, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wpackwus", 0xee900080, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wpackdss", 0xeef00080, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wpackdus", 0xeed00080, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wrorh", 0xee700040, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wrorhg", 0xee700148, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwcg},
! {"wrorw", 0xeeb00040, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wrorwg", 0xeeb00148, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwcg},
! {"wrord", 0xeef00040, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wrordg", 0xeef00148, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwcg},
! {"wsadb", 0xee000120, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wsadbz", 0xee100120, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wsadh", 0xee400120, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wsadhz", 0xee500120, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wshufh", 0xee0001e0, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wshufh},
! {"wsllh", 0xee500040, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wsllhg", 0xee500148, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwcg},
! {"wsllw", 0xee900040, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wsllwg", 0xee900148, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwcg},
! {"wslld", 0xeed00040, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wslldg", 0xeed00148, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwcg},
! {"wsrah", 0xee400040, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wsrahg", 0xee400148, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwcg},
! {"wsraw", 0xee800040, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wsrawg", 0xee800148, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwcg},
! {"wsrad", 0xeec00040, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wsradg", 0xeec00148, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwcg},
! {"wsrlh", 0xee600040, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wsrlhg", 0xee600148, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwcg},
! {"wsrlw", 0xeea00040, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wsrlwg", 0xeea00148, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwcg},
! {"wsrld", 0xeee00040, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wsrldg", 0xeee00148, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwcg},
! {"wstrb", 0xec000000, 5, ARM_CEXT_IWMMXT, do_iwmmxt_byte_addr},
! {"wstrh", 0xec000100, 5, ARM_CEXT_IWMMXT, do_iwmmxt_byte_addr},
! {"wstrw", 0xec000200, 5, ARM_CEXT_IWMMXT, do_iwmmxt_word_addr},
! {"wstrd", 0xec000300, 5, ARM_CEXT_IWMMXT, do_iwmmxt_word_addr},
! {"wsubbss", 0xee3001a0, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wsubb", 0xee0001a0, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wsubbus", 0xee1001a0, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wsubhss", 0xee7001a0, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wsubh", 0xee4001a0, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wsubhus", 0xee5001a0, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wsubwss", 0xeeb001a0, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wsubw", 0xee8001a0, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wsubwus", 0xee9001a0, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wunpckehub", 0xee0000c0, 10, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
! {"wunpckehuh", 0xee4000c0, 10, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
! {"wunpckehuw", 0xee8000c0, 10, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
! {"wunpckehsb", 0xee2000c0, 10, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
! {"wunpckehsh", 0xee6000c0, 10, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
! {"wunpckehsw", 0xeea000c0, 10, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
! {"wunpckihb", 0xee1000c0, 9, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wunpckihh", 0xee5000c0, 9, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wunpckihw", 0xee9000c0, 9, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wunpckelub", 0xee0000e0, 10, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
! {"wunpckeluh", 0xee4000e0, 10, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
! {"wunpckeluw", 0xee8000e0, 10, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
! {"wunpckelsb", 0xee2000e0, 10, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
! {"wunpckelsh", 0xee6000e0, 10, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
! {"wunpckelsw", 0xeea000e0, 10, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
! {"wunpckilb", 0xee1000e0, 9, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wunpckilh", 0xee5000e0, 9, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wunpckilw", 0xee9000e0, 9, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wxor", 0xee100000, 4, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
! {"wzero", 0xee300000, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wzero},
!
! /* Cirrus Maverick instructions. */
! {"cfldrs", 0xec100400, 6, ARM_CEXT_MAVERICK, do_mav_ldst_1},
! {"cfldrd", 0xec500400, 6, ARM_CEXT_MAVERICK, do_mav_ldst_2},
! {"cfldr32", 0xec100500, 7, ARM_CEXT_MAVERICK, do_mav_ldst_3},
! {"cfldr64", 0xec500500, 7, ARM_CEXT_MAVERICK, do_mav_ldst_4},
! {"cfstrs", 0xec000400, 6, ARM_CEXT_MAVERICK, do_mav_ldst_1},
! {"cfstrd", 0xec400400, 6, ARM_CEXT_MAVERICK, do_mav_ldst_2},
! {"cfstr32", 0xec000500, 7, ARM_CEXT_MAVERICK, do_mav_ldst_3},
! {"cfstr64", 0xec400500, 7, ARM_CEXT_MAVERICK, do_mav_ldst_4},
! {"cfmvsr", 0xee000450, 6, ARM_CEXT_MAVERICK, do_mav_binops_2a},
! {"cfmvrs", 0xee100450, 6, ARM_CEXT_MAVERICK, do_mav_binops_1a},
! {"cfmvdlr", 0xee000410, 7, ARM_CEXT_MAVERICK, do_mav_binops_2b},
! {"cfmvrdl", 0xee100410, 7, ARM_CEXT_MAVERICK, do_mav_binops_1b},
! {"cfmvdhr", 0xee000430, 7, ARM_CEXT_MAVERICK, do_mav_binops_2b},
! {"cfmvrdh", 0xee100430, 7, ARM_CEXT_MAVERICK, do_mav_binops_1b},
! {"cfmv64lr", 0xee000510, 8, ARM_CEXT_MAVERICK, do_mav_binops_2c},
! {"cfmvr64l", 0xee100510, 8, ARM_CEXT_MAVERICK, do_mav_binops_1c},
! {"cfmv64hr", 0xee000530, 8, ARM_CEXT_MAVERICK, do_mav_binops_2c},
! {"cfmvr64h", 0xee100530, 8, ARM_CEXT_MAVERICK, do_mav_binops_1c},
! {"cfmval32", 0xee200440, 8, ARM_CEXT_MAVERICK, do_mav_binops_3a},
! {"cfmv32al", 0xee100440, 8, ARM_CEXT_MAVERICK, do_mav_binops_3b},
! {"cfmvam32", 0xee200460, 8, ARM_CEXT_MAVERICK, do_mav_binops_3a},
! {"cfmv32am", 0xee100460, 8, ARM_CEXT_MAVERICK, do_mav_binops_3b},
! {"cfmvah32", 0xee200480, 8, ARM_CEXT_MAVERICK, do_mav_binops_3a},
! {"cfmv32ah", 0xee100480, 8, ARM_CEXT_MAVERICK, do_mav_binops_3b},
! {"cfmva32", 0xee2004a0, 7, ARM_CEXT_MAVERICK, do_mav_binops_3a},
! {"cfmv32a", 0xee1004a0, 7, ARM_CEXT_MAVERICK, do_mav_binops_3b},
! {"cfmva64", 0xee2004c0, 7, ARM_CEXT_MAVERICK, do_mav_binops_3c},
! {"cfmv64a", 0xee1004c0, 7, ARM_CEXT_MAVERICK, do_mav_binops_3d},
! {"cfmvsc32", 0xee2004e0, 8, ARM_CEXT_MAVERICK, do_mav_dspsc_1},
! {"cfmv32sc", 0xee1004e0, 8, ARM_CEXT_MAVERICK, do_mav_dspsc_2},
! {"cfcpys", 0xee000400, 6, ARM_CEXT_MAVERICK, do_mav_binops_1d},
! {"cfcpyd", 0xee000420, 6, ARM_CEXT_MAVERICK, do_mav_binops_1e},
! {"cfcvtsd", 0xee000460, 7, ARM_CEXT_MAVERICK, do_mav_binops_1f},
! {"cfcvtds", 0xee000440, 7, ARM_CEXT_MAVERICK, do_mav_binops_1g},
! {"cfcvt32s", 0xee000480, 8, ARM_CEXT_MAVERICK, do_mav_binops_1h},
! {"cfcvt32d", 0xee0004a0, 8, ARM_CEXT_MAVERICK, do_mav_binops_1i},
! {"cfcvt64s", 0xee0004c0, 8, ARM_CEXT_MAVERICK, do_mav_binops_1j},
! {"cfcvt64d", 0xee0004e0, 8, ARM_CEXT_MAVERICK, do_mav_binops_1k},
! {"cfcvts32", 0xee100580, 8, ARM_CEXT_MAVERICK, do_mav_binops_1l},
! {"cfcvtd32", 0xee1005a0, 8, ARM_CEXT_MAVERICK, do_mav_binops_1m},
! {"cftruncs32", 0xee1005c0, 10, ARM_CEXT_MAVERICK, do_mav_binops_1l},
! {"cftruncd32", 0xee1005e0, 10, ARM_CEXT_MAVERICK, do_mav_binops_1m},
! {"cfrshl32", 0xee000550, 8, ARM_CEXT_MAVERICK, do_mav_triple_4a},
! {"cfrshl64", 0xee000570, 8, ARM_CEXT_MAVERICK, do_mav_triple_4b},
! {"cfsh32", 0xee000500, 6, ARM_CEXT_MAVERICK, do_mav_shift_1},
! {"cfsh64", 0xee200500, 6, ARM_CEXT_MAVERICK, do_mav_shift_2},
! {"cfcmps", 0xee100490, 6, ARM_CEXT_MAVERICK, do_mav_triple_5a},
! {"cfcmpd", 0xee1004b0, 6, ARM_CEXT_MAVERICK, do_mav_triple_5b},
! {"cfcmp32", 0xee100590, 7, ARM_CEXT_MAVERICK, do_mav_triple_5c},
! {"cfcmp64", 0xee1005b0, 7, ARM_CEXT_MAVERICK, do_mav_triple_5d},
! {"cfabss", 0xee300400, 6, ARM_CEXT_MAVERICK, do_mav_binops_1d},
! {"cfabsd", 0xee300420, 6, ARM_CEXT_MAVERICK, do_mav_binops_1e},
! {"cfnegs", 0xee300440, 6, ARM_CEXT_MAVERICK, do_mav_binops_1d},
! {"cfnegd", 0xee300460, 6, ARM_CEXT_MAVERICK, do_mav_binops_1e},
! {"cfadds", 0xee300480, 6, ARM_CEXT_MAVERICK, do_mav_triple_5e},
! {"cfaddd", 0xee3004a0, 6, ARM_CEXT_MAVERICK, do_mav_triple_5f},
! {"cfsubs", 0xee3004c0, 6, ARM_CEXT_MAVERICK, do_mav_triple_5e},
! {"cfsubd", 0xee3004e0, 6, ARM_CEXT_MAVERICK, do_mav_triple_5f},
! {"cfmuls", 0xee100400, 6, ARM_CEXT_MAVERICK, do_mav_triple_5e},
! {"cfmuld", 0xee100420, 6, ARM_CEXT_MAVERICK, do_mav_triple_5f},
! {"cfabs32", 0xee300500, 7, ARM_CEXT_MAVERICK, do_mav_binops_1n},
! {"cfabs64", 0xee300520, 7, ARM_CEXT_MAVERICK, do_mav_binops_1o},
! {"cfneg32", 0xee300540, 7, ARM_CEXT_MAVERICK, do_mav_binops_1n},
! {"cfneg64", 0xee300560, 7, ARM_CEXT_MAVERICK, do_mav_binops_1o},
! {"cfadd32", 0xee300580, 7, ARM_CEXT_MAVERICK, do_mav_triple_5g},
! {"cfadd64", 0xee3005a0, 7, ARM_CEXT_MAVERICK, do_mav_triple_5h},
! {"cfsub32", 0xee3005c0, 7, ARM_CEXT_MAVERICK, do_mav_triple_5g},
! {"cfsub64", 0xee3005e0, 7, ARM_CEXT_MAVERICK, do_mav_triple_5h},
! {"cfmul32", 0xee100500, 7, ARM_CEXT_MAVERICK, do_mav_triple_5g},
! {"cfmul64", 0xee100520, 7, ARM_CEXT_MAVERICK, do_mav_triple_5h},
! {"cfmac32", 0xee100540, 7, ARM_CEXT_MAVERICK, do_mav_triple_5g},
! {"cfmsc32", 0xee100560, 7, ARM_CEXT_MAVERICK, do_mav_triple_5g},
! {"cfmadd32", 0xee000600, 8, ARM_CEXT_MAVERICK, do_mav_quad_6a},
! {"cfmsub32", 0xee100600, 8, ARM_CEXT_MAVERICK, do_mav_quad_6a},
! {"cfmadda32", 0xee200600, 9, ARM_CEXT_MAVERICK, do_mav_quad_6b},
! {"cfmsuba32", 0xee300600, 9, ARM_CEXT_MAVERICK, do_mav_quad_6b},
! };
!
! /* Defines for various bits that we will want to toggle. */
! #define INST_IMMEDIATE 0x02000000
! #define OFFSET_REG 0x02000000
! #define HWOFFSET_IMM 0x00400000
! #define SHIFT_BY_REG 0x00000010
! #define PRE_INDEX 0x01000000
! #define INDEX_UP 0x00800000
! #define WRITE_BACK 0x00200000
! #define LDM_TYPE_2_OR_3 0x00400000
!
! #define LITERAL_MASK 0xf000f000
! #define OPCODE_MASK 0xfe1fffff
! #define V4_STR_BIT 0x00000020
!
! #define DATA_OP_SHIFT 21
!
! /* Codes to distinguish the arithmetic instructions. */
! #define OPCODE_AND 0
! #define OPCODE_EOR 1
! #define OPCODE_SUB 2
! #define OPCODE_RSB 3
! #define OPCODE_ADD 4
! #define OPCODE_ADC 5
! #define OPCODE_SBC 6
! #define OPCODE_RSC 7
! #define OPCODE_TST 8
! #define OPCODE_TEQ 9
! #define OPCODE_CMP 10
! #define OPCODE_CMN 11
! #define OPCODE_ORR 12
! #define OPCODE_MOV 13
! #define OPCODE_BIC 14
! #define OPCODE_MVN 15
!
! /* Thumb v1 (ARMv4T). */
! static void do_t_nop PARAMS ((char *));
! static void do_t_arit PARAMS ((char *));
! static void do_t_add PARAMS ((char *));
! static void do_t_asr PARAMS ((char *));
! static void do_t_branch9 PARAMS ((char *));
! static void do_t_branch12 PARAMS ((char *));
! static void do_t_branch23 PARAMS ((char *));
! static void do_t_bx PARAMS ((char *));
! static void do_t_compare PARAMS ((char *));
! static void do_t_ldmstm PARAMS ((char *));
! static void do_t_ldr PARAMS ((char *));
! static void do_t_ldrb PARAMS ((char *));
! static void do_t_ldrh PARAMS ((char *));
! static void do_t_lds PARAMS ((char *));
! static void do_t_lsl PARAMS ((char *));
! static void do_t_lsr PARAMS ((char *));
! static void do_t_mov PARAMS ((char *));
! static void do_t_push_pop PARAMS ((char *));
! static void do_t_str PARAMS ((char *));
! static void do_t_strb PARAMS ((char *));
! static void do_t_strh PARAMS ((char *));
! static void do_t_sub PARAMS ((char *));
! static void do_t_swi PARAMS ((char *));
! static void do_t_adr PARAMS ((char *));
!
! /* Thumb v2 (ARMv5T). */
! static void do_t_blx PARAMS ((char *));
! static void do_t_bkpt PARAMS ((char *));
!
! /* ARM V6. */
! static void do_t_cps PARAMS ((char *));
! static void do_t_cpy PARAMS ((char *));
! static void do_t_setend PARAMS ((char *));;
!
! #define T_OPCODE_MUL 0x4340
! #define T_OPCODE_TST 0x4200
! #define T_OPCODE_CMN 0x42c0
! #define T_OPCODE_NEG 0x4240
! #define T_OPCODE_MVN 0x43c0
!
! #define T_OPCODE_ADD_R3 0x1800
! #define T_OPCODE_SUB_R3 0x1a00
! #define T_OPCODE_ADD_HI 0x4400
! #define T_OPCODE_ADD_ST 0xb000
! #define T_OPCODE_SUB_ST 0xb080
! #define T_OPCODE_ADD_SP 0xa800
! #define T_OPCODE_ADD_PC 0xa000
! #define T_OPCODE_ADD_I8 0x3000
! #define T_OPCODE_SUB_I8 0x3800
! #define T_OPCODE_ADD_I3 0x1c00
! #define T_OPCODE_SUB_I3 0x1e00
!
! #define T_OPCODE_ASR_R 0x4100
! #define T_OPCODE_LSL_R 0x4080
! #define T_OPCODE_LSR_R 0x40c0
! #define T_OPCODE_ASR_I 0x1000
! #define T_OPCODE_LSL_I 0x0000
! #define T_OPCODE_LSR_I 0x0800
!
! #define T_OPCODE_MOV_I8 0x2000
! #define T_OPCODE_CMP_I8 0x2800
! #define T_OPCODE_CMP_LR 0x4280
! #define T_OPCODE_MOV_HR 0x4600
! #define T_OPCODE_CMP_HR 0x4500
!
! #define T_OPCODE_LDR_PC 0x4800
! #define T_OPCODE_LDR_SP 0x9800
! #define T_OPCODE_STR_SP 0x9000
! #define T_OPCODE_LDR_IW 0x6800
! #define T_OPCODE_STR_IW 0x6000
! #define T_OPCODE_LDR_IH 0x8800
! #define T_OPCODE_STR_IH 0x8000
! #define T_OPCODE_LDR_IB 0x7800
! #define T_OPCODE_STR_IB 0x7000
! #define T_OPCODE_LDR_RW 0x5800
! #define T_OPCODE_STR_RW 0x5000
! #define T_OPCODE_LDR_RH 0x5a00
! #define T_OPCODE_STR_RH 0x5200
! #define T_OPCODE_LDR_RB 0x5c00
! #define T_OPCODE_STR_RB 0x5400
!
! #define T_OPCODE_PUSH 0xb400
! #define T_OPCODE_POP 0xbc00
!
! #define T_OPCODE_BRANCH 0xe7fe
!
! static int thumb_reg PARAMS ((char ** str, int hi_lo));
!
! #define THUMB_SIZE 2 /* Size of thumb instruction. */
! #define THUMB_REG_LO 0x1
! #define THUMB_REG_HI 0x2
! #define THUMB_REG_ANY 0x3
!
! #define THUMB_H1 0x0080
! #define THUMB_H2 0x0040
!
! #define THUMB_ASR 0
! #define THUMB_LSL 1
! #define THUMB_LSR 2
!
! #define THUMB_MOVE 0
! #define THUMB_COMPARE 1
! #define THUMB_CPY 2
!
! #define THUMB_LOAD 0
! #define THUMB_STORE 1
!
! #define THUMB_PP_PC_LR 0x0100
!
! /* These three are used for immediate shifts, do not alter. */
! #define THUMB_WORD 2
! #define THUMB_HALFWORD 1
! #define THUMB_BYTE 0
!
! struct thumb_opcode
! {
! /* Basic string to match. */
! const char * template;
!
! /* Basic instruction code. */
! unsigned long value;
!
! int size;
/* Which CPU variants this exists for. */
unsigned long variant;
/* Function to call to parse args. */
! void (* parms) PARAMS ((char *));
! };
!
! static const struct thumb_opcode tinsns[] =
! {
! /* Thumb v1 (ARMv4T). */
! {"adc", 0x4140, 2, ARM_EXT_V4T, do_t_arit},
! {"add", 0x0000, 2, ARM_EXT_V4T, do_t_add},
! {"and", 0x4000, 2, ARM_EXT_V4T, do_t_arit},
! {"asr", 0x0000, 2, ARM_EXT_V4T, do_t_asr},
! {"b", T_OPCODE_BRANCH, 2, ARM_EXT_V4T, do_t_branch12},
! {"beq", 0xd0fe, 2, ARM_EXT_V4T, do_t_branch9},
! {"bne", 0xd1fe, 2, ARM_EXT_V4T, do_t_branch9},
! {"bcs", 0xd2fe, 2, ARM_EXT_V4T, do_t_branch9},
! {"bhs", 0xd2fe, 2, ARM_EXT_V4T, do_t_branch9},
! {"bcc", 0xd3fe, 2, ARM_EXT_V4T, do_t_branch9},
! {"bul", 0xd3fe, 2, ARM_EXT_V4T, do_t_branch9},
! {"blo", 0xd3fe, 2, ARM_EXT_V4T, do_t_branch9},
! {"bmi", 0xd4fe, 2, ARM_EXT_V4T, do_t_branch9},
! {"bpl", 0xd5fe, 2, ARM_EXT_V4T, do_t_branch9},
! {"bvs", 0xd6fe, 2, ARM_EXT_V4T, do_t_branch9},
! {"bvc", 0xd7fe, 2, ARM_EXT_V4T, do_t_branch9},
! {"bhi", 0xd8fe, 2, ARM_EXT_V4T, do_t_branch9},
! {"bls", 0xd9fe, 2, ARM_EXT_V4T, do_t_branch9},
! {"bge", 0xdafe, 2, ARM_EXT_V4T, do_t_branch9},
! {"blt", 0xdbfe, 2, ARM_EXT_V4T, do_t_branch9},
! {"bgt", 0xdcfe, 2, ARM_EXT_V4T, do_t_branch9},
! {"ble", 0xddfe, 2, ARM_EXT_V4T, do_t_branch9},
! {"bal", 0xdefe, 2, ARM_EXT_V4T, do_t_branch9},
! {"bic", 0x4380, 2, ARM_EXT_V4T, do_t_arit},
! {"bl", 0xf7fffffe, 4, ARM_EXT_V4T, do_t_branch23},
! {"bx", 0x4700, 2, ARM_EXT_V4T, do_t_bx},
! {"cmn", T_OPCODE_CMN, 2, ARM_EXT_V4T, do_t_arit},
! {"cmp", 0x0000, 2, ARM_EXT_V4T, do_t_compare},
! {"eor", 0x4040, 2, ARM_EXT_V4T, do_t_arit},
! {"ldmia", 0xc800, 2, ARM_EXT_V4T, do_t_ldmstm},
! {"ldr", 0x0000, 2, ARM_EXT_V4T, do_t_ldr},
! {"ldrb", 0x0000, 2, ARM_EXT_V4T, do_t_ldrb},
! {"ldrh", 0x0000, 2, ARM_EXT_V4T, do_t_ldrh},
! {"ldrsb", 0x5600, 2, ARM_EXT_V4T, do_t_lds},
! {"ldrsh", 0x5e00, 2, ARM_EXT_V4T, do_t_lds},
! {"ldsb", 0x5600, 2, ARM_EXT_V4T, do_t_lds},
! {"ldsh", 0x5e00, 2, ARM_EXT_V4T, do_t_lds},
! {"lsl", 0x0000, 2, ARM_EXT_V4T, do_t_lsl},
! {"lsr", 0x0000, 2, ARM_EXT_V4T, do_t_lsr},
! {"mov", 0x0000, 2, ARM_EXT_V4T, do_t_mov},
! {"mul", T_OPCODE_MUL, 2, ARM_EXT_V4T, do_t_arit},
! {"mvn", T_OPCODE_MVN, 2, ARM_EXT_V4T, do_t_arit},
! {"neg", T_OPCODE_NEG, 2, ARM_EXT_V4T, do_t_arit},
! {"orr", 0x4300, 2, ARM_EXT_V4T, do_t_arit},
! {"pop", 0xbc00, 2, ARM_EXT_V4T, do_t_push_pop},
! {"push", 0xb400, 2, ARM_EXT_V4T, do_t_push_pop},
! {"ror", 0x41c0, 2, ARM_EXT_V4T, do_t_arit},
! {"sbc", 0x4180, 2, ARM_EXT_V4T, do_t_arit},
! {"stmia", 0xc000, 2, ARM_EXT_V4T, do_t_ldmstm},
! {"str", 0x0000, 2, ARM_EXT_V4T, do_t_str},
! {"strb", 0x0000, 2, ARM_EXT_V4T, do_t_strb},
! {"strh", 0x0000, 2, ARM_EXT_V4T, do_t_strh},
! {"swi", 0xdf00, 2, ARM_EXT_V4T, do_t_swi},
! {"sub", 0x0000, 2, ARM_EXT_V4T, do_t_sub},
! {"tst", T_OPCODE_TST, 2, ARM_EXT_V4T, do_t_arit},
! /* Pseudo ops: */
! {"adr", 0x0000, 2, ARM_EXT_V4T, do_t_adr},
! {"nop", 0x46C0, 2, ARM_EXT_V4T, do_t_nop}, /* mov r8,r8 */
! /* Thumb v2 (ARMv5T). */
! {"blx", 0, 0, ARM_EXT_V5T, do_t_blx},
! {"bkpt", 0xbe00, 2, ARM_EXT_V5T, do_t_bkpt},
!
! /* ARM V6. */
! {"cpsie", 0xb660, 2, ARM_EXT_V6, do_t_cps},
! {"cpsid", 0xb670, 2, ARM_EXT_V6, do_t_cps},
! {"cpy", 0x4600, 2, ARM_EXT_V6, do_t_cpy},
! {"rev", 0xba00, 2, ARM_EXT_V6, do_t_arit},
! {"rev16", 0xba40, 2, ARM_EXT_V6, do_t_arit},
! {"revsh", 0xbac0, 2, ARM_EXT_V6, do_t_arit},
! {"setend", 0xb650, 2, ARM_EXT_V6, do_t_setend},
! {"sxth", 0xb200, 2, ARM_EXT_V6, do_t_arit},
! {"sxtb", 0xb240, 2, ARM_EXT_V6, do_t_arit},
! {"uxth", 0xb280, 2, ARM_EXT_V6, do_t_arit},
! {"uxtb", 0xb2c0, 2, ARM_EXT_V6, do_t_arit},
};
#define BAD_ARGS _("bad arguments to instruction")
--- 791,926 ----
unsigned long variant;
/* Function to call to parse args. */
! void (* parms) (char *);
};
! /* Defines for various bits that we will want to toggle. */
! #define INST_IMMEDIATE 0x02000000
! #define OFFSET_REG 0x02000000
! #define HWOFFSET_IMM 0x00400000
! #define SHIFT_BY_REG 0x00000010
! #define PRE_INDEX 0x01000000
! #define INDEX_UP 0x00800000
! #define WRITE_BACK 0x00200000
! #define LDM_TYPE_2_OR_3 0x00400000
! #define LITERAL_MASK 0xf000f000
! #define OPCODE_MASK 0xfe1fffff
! #define V4_STR_BIT 0x00000020
! #define DATA_OP_SHIFT 21
! /* Codes to distinguish the arithmetic instructions. */
! #define OPCODE_AND 0
! #define OPCODE_EOR 1
! #define OPCODE_SUB 2
! #define OPCODE_RSB 3
! #define OPCODE_ADD 4
! #define OPCODE_ADC 5
! #define OPCODE_SBC 6
! #define OPCODE_RSC 7
! #define OPCODE_TST 8
! #define OPCODE_TEQ 9
! #define OPCODE_CMP 10
! #define OPCODE_CMN 11
! #define OPCODE_ORR 12
! #define OPCODE_MOV 13
! #define OPCODE_BIC 14
! #define OPCODE_MVN 15
! #define T_OPCODE_MUL 0x4340
! #define T_OPCODE_TST 0x4200
! #define T_OPCODE_CMN 0x42c0
! #define T_OPCODE_NEG 0x4240
! #define T_OPCODE_MVN 0x43c0
! #define T_OPCODE_ADD_R3 0x1800
! #define T_OPCODE_SUB_R3 0x1a00
! #define T_OPCODE_ADD_HI 0x4400
! #define T_OPCODE_ADD_ST 0xb000
! #define T_OPCODE_SUB_ST 0xb080
! #define T_OPCODE_ADD_SP 0xa800
! #define T_OPCODE_ADD_PC 0xa000
! #define T_OPCODE_ADD_I8 0x3000
! #define T_OPCODE_SUB_I8 0x3800
! #define T_OPCODE_ADD_I3 0x1c00
! #define T_OPCODE_SUB_I3 0x1e00
! #define T_OPCODE_ASR_R 0x4100
! #define T_OPCODE_LSL_R 0x4080
! #define T_OPCODE_LSR_R 0x40c0
! #define T_OPCODE_ASR_I 0x1000
! #define T_OPCODE_LSL_I 0x0000
! #define T_OPCODE_LSR_I 0x0800
! #define T_OPCODE_MOV_I8 0x2000
! #define T_OPCODE_CMP_I8 0x2800
! #define T_OPCODE_CMP_LR 0x4280
! #define T_OPCODE_MOV_HR 0x4600
! #define T_OPCODE_CMP_HR 0x4500
! #define T_OPCODE_LDR_PC 0x4800
! #define T_OPCODE_LDR_SP 0x9800
! #define T_OPCODE_STR_SP 0x9000
! #define T_OPCODE_LDR_IW 0x6800
! #define T_OPCODE_STR_IW 0x6000
! #define T_OPCODE_LDR_IH 0x8800
! #define T_OPCODE_STR_IH 0x8000
! #define T_OPCODE_LDR_IB 0x7800
! #define T_OPCODE_STR_IB 0x7000
! #define T_OPCODE_LDR_RW 0x5800
! #define T_OPCODE_STR_RW 0x5000
! #define T_OPCODE_LDR_RH 0x5a00
! #define T_OPCODE_STR_RH 0x5200
! #define T_OPCODE_LDR_RB 0x5c00
! #define T_OPCODE_STR_RB 0x5400
! #define T_OPCODE_PUSH 0xb400
! #define T_OPCODE_POP 0xbc00
! #define T_OPCODE_BRANCH 0xe7fe
! #define THUMB_SIZE 2 /* Size of thumb instruction. */
! #define THUMB_REG_LO 0x1
! #define THUMB_REG_HI 0x2
! #define THUMB_REG_ANY 0x3
! #define THUMB_H1 0x0080
! #define THUMB_H2 0x0040
! #define THUMB_ASR 0
! #define THUMB_LSL 1
! #define THUMB_LSR 2
! #define THUMB_MOVE 0
! #define THUMB_COMPARE 1
! #define THUMB_CPY 2
! #define THUMB_LOAD 0
! #define THUMB_STORE 1
! #define THUMB_PP_PC_LR 0x0100
! /* These three are used for immediate shifts, do not alter. */
! #define THUMB_WORD 2
! #define THUMB_HALFWORD 1
! #define THUMB_BYTE 0
! struct thumb_opcode
! {
! /* Basic string to match. */
! const char * template;
! /* Basic instruction code. */
! unsigned long value;
! int size;
/* Which CPU variants this exists for. */
unsigned long variant;
/* Function to call to parse args. */
! void (* parms) (char *);
};
#define BAD_ARGS _("bad arguments to instruction")
*************** static struct hash_control * arm_cond_hs
*** 2425,2499 ****
static struct hash_control * arm_shift_hsh = NULL;
static struct hash_control * arm_psr_hsh = NULL;
- /* This table describes all the machine specific pseudo-ops the assembler
- has to support. The fields are:
- pseudo-op name without dot
- function to call to execute this pseudo-op
- Integer arg to pass to the function. */
-
- static void s_req PARAMS ((int));
- static void s_unreq PARAMS ((int));
- static void s_align PARAMS ((int));
- static void s_bss PARAMS ((int));
- static void s_even PARAMS ((int));
- static void s_ltorg PARAMS ((int));
- static void s_arm PARAMS ((int));
- static void s_thumb PARAMS ((int));
- static void s_code PARAMS ((int));
- static void s_force_thumb PARAMS ((int));
- static void s_thumb_func PARAMS ((int));
- static void s_thumb_set PARAMS ((int));
- #ifdef OBJ_ELF
- static void s_arm_elf_cons PARAMS ((int));
- static void s_arm_rel31 (int nbytes);
- #endif
-
- static int my_get_expression PARAMS ((expressionS *, char **));
-
- const pseudo_typeS md_pseudo_table[] =
- {
- /* Never called because '.req' does not start a line. */
- { "req", s_req, 0 },
- { "unreq", s_unreq, 0 },
- { "bss", s_bss, 0 },
- { "align", s_align, 0 },
- { "arm", s_arm, 0 },
- { "thumb", s_thumb, 0 },
- { "code", s_code, 0 },
- { "force_thumb", s_force_thumb, 0 },
- { "thumb_func", s_thumb_func, 0 },
- { "thumb_set", s_thumb_set, 0 },
- { "even", s_even, 0 },
- { "ltorg", s_ltorg, 0 },
- { "pool", s_ltorg, 0 },
- #ifdef OBJ_ELF
- { "word", s_arm_elf_cons, 4 },
- { "long", s_arm_elf_cons, 4 },
- { "rel31", s_arm_rel31, 0 },
- #else
- { "word", cons, 4},
- #endif
- { "extend", float_cons, 'x' },
- { "ldouble", float_cons, 'x' },
- { "packed", float_cons, 'p' },
- { 0, 0, 0 }
- };
-
- /* Other internal functions. */
- static int arm_parse_extension PARAMS ((char *, int *));
- static int arm_parse_cpu PARAMS ((char *));
- static int arm_parse_arch PARAMS ((char *));
- static int arm_parse_fpu PARAMS ((char *));
- static int arm_parse_float_abi PARAMS ((char *));
- #ifdef OBJ_ELF
- static int arm_parse_eabi PARAMS ((char *));
- #endif
- #if 0 /* Suppressed - for now. */
- #if defined OBJ_COFF || defined OBJ_ELF
- static void arm_add_note PARAMS ((const char *, const char *, unsigned int));
- #endif
- #endif
-
/* Stuff needed to resolve the label ambiguity
As:
...
--- 934,939 ----
*************** static void arm_add_note PARAMS ((const
*** 2506,2518 ****
symbolS * last_label_seen;
static int label_is_thumb_function_name = FALSE;
!
/* Literal Pool stuff. */
#define MAX_LITERAL_POOL_SIZE 1024
/* Literal pool structure. Held on a per-section
and per-sub-section basis. */
typedef struct literal_pool
{
expressionS literals [MAX_LITERAL_POOL_SIZE];
--- 946,959 ----
symbolS * last_label_seen;
static int label_is_thumb_function_name = FALSE;
!
/* Literal Pool stuff. */
#define MAX_LITERAL_POOL_SIZE 1024
/* Literal pool structure. Held on a per-section
and per-sub-section basis. */
+
typedef struct literal_pool
{
expressionS literals [MAX_LITERAL_POOL_SIZE];
*************** typedef struct literal_pool
*** 2527,2537 ****
/* Pointer to a linked list of literal pools. */
literal_pool * list_of_pools = NULL;
- static literal_pool * find_literal_pool PARAMS ((void));
- static literal_pool * find_or_make_literal_pool PARAMS ((void));
-
static literal_pool *
! find_literal_pool ()
{
literal_pool * pool;
--- 968,975 ----
/* Pointer to a linked list of literal pools. */
literal_pool * list_of_pools = NULL;
static literal_pool *
! find_literal_pool (void)
{
literal_pool * pool;
*************** find_literal_pool ()
*** 2546,2552 ****
}
static literal_pool *
! find_or_make_literal_pool ()
{
/* Next literal pool ID number. */
static unsigned int latest_pool_num = 1;
--- 984,990 ----
}
static literal_pool *
! find_or_make_literal_pool (void)
{
/* Next literal pool ID number. */
static unsigned int latest_pool_num = 1;
*************** find_or_make_literal_pool ()
*** 2557,2563 ****
if (pool == NULL)
{
/* Create a new pool. */
! pool = (literal_pool *) xmalloc (sizeof (* pool));
if (! pool)
return NULL;
--- 995,1001 ----
if (pool == NULL)
{
/* Create a new pool. */
! pool = xmalloc (sizeof (* pool));
if (! pool)
return NULL;
*************** find_or_make_literal_pool ()
*** 2585,2592 ****
/* Add the literal in the global 'inst'
structure to the relevent literal pool. */
static int
! add_to_lit_pool ()
{
literal_pool * pool;
unsigned int entry;
--- 1023,1031 ----
/* Add the literal in the global 'inst'
structure to the relevent literal pool. */
+
static int
! add_to_lit_pool (void)
{
literal_pool * pool;
unsigned int entry;
*************** add_to_lit_pool ()
*** 2639,2650 ****
a later date assign it a value. Thats what these functions do. */
static void
! symbol_locate (symbolP, name, segment, valu, frag)
! symbolS * symbolP;
! const char * name; /* It is copied, the caller can modify. */
! segT segment; /* Segment identifier (SEG_<something>). */
! valueT valu; /* Symbol value. */
! fragS * frag; /* Associated fragment. */
{
unsigned int name_length;
char * preserved_copy_of_name;
--- 1078,1088 ----
a later date assign it a value. Thats what these functions do. */
static void
! symbol_locate (symbolS * symbolP,
! const char * name, /* It is copied, the caller can modify. */
! segT segment, /* Segment identifier (SEG_<something>). */
! valueT valu, /* Symbol value. */
! fragS * frag) /* Associated fragment. */
{
unsigned int name_length;
char * preserved_copy_of_name;
*************** symbol_locate (symbolP, name, segment, v
*** 2673,2678 ****
--- 1111,1117 ----
/* Link to end of symbol chain. */
{
extern int symbol_table_frozen;
+
if (symbol_table_frozen)
abort ();
}
*************** symbol_locate (symbolP, name, segment, v
*** 2694,2701 ****
If so, convert it to the right format. */
static unsigned int
! validate_immediate (val)
! unsigned int val;
{
unsigned int a;
unsigned int i;
--- 1133,1139 ----
If so, convert it to the right format. */
static unsigned int
! validate_immediate (unsigned int val)
{
unsigned int a;
unsigned int i;
*************** validate_immediate (val)
*** 2714,2722 ****
computed by just one ARM instruction. */
static unsigned int
! validate_immediate_twopart (val, highpart)
! unsigned int val;
! unsigned int * highpart;
{
unsigned int a;
unsigned int i;
--- 1152,1159 ----
computed by just one ARM instruction. */
static unsigned int
! validate_immediate_twopart (unsigned int val,
! unsigned int * highpart)
{
unsigned int a;
unsigned int i;
*************** validate_immediate_twopart (val, highpar
*** 2749,2757 ****
}
static int
! validate_offset_imm (val, hwse)
! unsigned int val;
! int hwse;
{
if ((hwse && val > 255) || val > 4095)
return FAIL;
--- 1186,1192 ----
}
static int
! validate_offset_imm (unsigned int val, int hwse)
{
if ((hwse && val > 255) || val > 4095)
return FAIL;
*************** mapping_state (enum mstate state)
*** 2865,2871 ****
type = BSF_FUNCTION;
break;
case MAP_UNDEFINED:
! return;
default:
abort ();
}
--- 1300,1306 ----
type = BSF_FUNCTION;
break;
case MAP_UNDEFINED:
! return;
default:
abort ();
}
*************** mapping_state (enum mstate state)
*** 2875,2881 ****
symbolP = symbol_new (symname, now_seg, (valueT) frag_now_fix (), frag_now);
symbol_table_insert (symbolP);
symbol_get_bfdsym (symbolP)->flags |= type | BSF_LOCAL;
!
switch (state)
{
case MAP_ARM:
--- 1310,1316 ----
symbolP = symbol_new (symname, now_seg, (valueT) frag_now_fix (), frag_now);
symbol_table_insert (symbolP);
symbol_get_bfdsym (symbolP)->flags |= type | BSF_LOCAL;
!
switch (state)
{
case MAP_ARM:
*************** mapping_state (enum mstate state)
*** 2883,2927 ****
ARM_SET_THUMB (symbolP, 0);
ARM_SET_INTERWORK (symbolP, support_interwork);
break;
!
case MAP_THUMB:
THUMB_SET_FUNC (symbolP, 1);
ARM_SET_THUMB (symbolP, 1);
ARM_SET_INTERWORK (symbolP, support_interwork);
break;
!
case MAP_DATA:
default:
return;
}
}
! /* When we change sections we need to issue a new mapping symbol. */
! void
! arm_elf_change_section (void)
{
! flagword flags;
! if (!SEG_NORMAL (now_seg))
! return;
! flags = bfd_get_section_flags (stdoutput, now_seg);
! /* We can ignore sections that only contain debug info. */
! if ((flags & SEC_ALLOC) == 0)
! return;
! mapstate = seg_info (now_seg)->tc_segment_info_data;
}
- #else
- #define mapping_state(a)
- #endif /* OBJ_ELF */
-
static void
! s_req (a)
! int a ATTRIBUTE_UNUSED;
{
as_bad (_("invalid syntax for .req directive"));
}
--- 1318,1458 ----
ARM_SET_THUMB (symbolP, 0);
ARM_SET_INTERWORK (symbolP, support_interwork);
break;
!
case MAP_THUMB:
THUMB_SET_FUNC (symbolP, 1);
ARM_SET_THUMB (symbolP, 1);
ARM_SET_INTERWORK (symbolP, support_interwork);
break;
!
case MAP_DATA:
default:
return;
}
}
! /* When we change sections we need to issue a new mapping symbol. */
!
! void
! arm_elf_change_section (void)
! {
! flagword flags;
!
! if (!SEG_NORMAL (now_seg))
! return;
!
! flags = bfd_get_section_flags (stdoutput, now_seg);
!
! /* We can ignore sections that only contain debug info. */
! if ((flags & SEC_ALLOC) == 0)
! return;
!
! mapstate = seg_info (now_seg)->tc_segment_info_data;
! }
! #else
! #define mapping_state(a)
! #endif /* OBJ_ELF */
!
! /* arm_reg_parse () := if it looks like a register, return its token and
! advance the pointer. */
!
! static int
! arm_reg_parse (char ** ccp, struct hash_control * htab)
! {
! char * start = * ccp;
! char c;
! char * p;
! struct reg_entry * reg;
!
! #ifdef REGISTER_PREFIX
! if (*start != REGISTER_PREFIX)
! return FAIL;
! p = start + 1;
! #else
! p = start;
! #ifdef OPTIONAL_REGISTER_PREFIX
! if (*p == OPTIONAL_REGISTER_PREFIX)
! p++, start++;
! #endif
! #endif
! if (!ISALPHA (*p) || !is_name_beginner (*p))
! return FAIL;
!
! c = *p++;
! while (ISALPHA (c) || ISDIGIT (c) || c == '_')
! c = *p++;
!
! *--p = 0;
! reg = (struct reg_entry *) hash_find (htab, start);
! *p = c;
!
! if (reg)
! {
! *ccp = p;
! return reg->number;
! }
!
! return FAIL;
! }
!
! /* Search for the following register name in each of the possible reg name
! tables. Return the classification if found, or REG_TYPE_MAX if not
! present. */
! static enum arm_reg_type
! arm_reg_parse_any (char *cp)
{
! int i;
! for (i = (int) REG_TYPE_FIRST; i < (int) REG_TYPE_MAX; i++)
! if (arm_reg_parse (&cp, all_reg_maps[i].htab) != FAIL)
! return (enum arm_reg_type) i;
! return REG_TYPE_MAX;
! }
! static void
! opcode_select (int width)
! {
! switch (width)
! {
! case 16:
! if (! thumb_mode)
! {
! if (! (cpu_variant & ARM_EXT_V4T))
! as_bad (_("selected processor does not support THUMB opcodes"));
! thumb_mode = 1;
! /* No need to force the alignment, since we will have been
! coming from ARM mode, which is word-aligned. */
! record_alignment (now_seg, 1);
! }
! mapping_state (MAP_THUMB);
! break;
!
! case 32:
! if (thumb_mode)
! {
! if ((cpu_variant & ARM_ALL) == ARM_EXT_V4T)
! as_bad (_("selected processor does not support ARM opcodes"));
!
! thumb_mode = 0;
!
! if (!need_pass_2)
! frag_align (2, 0, 0);
!
! record_alignment (now_seg, 1);
! }
! mapping_state (MAP_ARM);
! break;
!
! default:
! as_bad (_("invalid instruction size selected (%d)"), width);
! }
}
static void
! s_req (int a ATTRIBUTE_UNUSED)
{
as_bad (_("invalid syntax for .req directive"));
}
*************** s_req (a)
*** 2935,2941 ****
static void
s_unreq (int a ATTRIBUTE_UNUSED)
{
! char *name;
char saved_char;
skip_whitespace (input_line_pointer);
--- 1466,1472 ----
static void
s_unreq (int a ATTRIBUTE_UNUSED)
{
! char * name;
char saved_char;
skip_whitespace (input_line_pointer);
*************** s_unreq (int a ATTRIBUTE_UNUSED)
*** 2998,3005 ****
}
static void
! s_bss (ignore)
! int ignore ATTRIBUTE_UNUSED;
{
/* We don't support putting frags in the BSS segment, we fake it by
marking in_bss, then looking at s_skip for clues. */
--- 1529,1535 ----
}
static void
! s_bss (int ignore ATTRIBUTE_UNUSED)
{
/* We don't support putting frags in the BSS segment, we fake it by
marking in_bss, then looking at s_skip for clues. */
*************** s_bss (ignore)
*** 3009,3016 ****
}
static void
! s_even (ignore)
! int ignore ATTRIBUTE_UNUSED;
{
/* Never make frag if expect extra pass. */
if (!need_pass_2)
--- 1539,1545 ----
}
static void
! s_even (int ignore ATTRIBUTE_UNUSED)
{
/* Never make frag if expect extra pass. */
if (!need_pass_2)
*************** s_even (ignore)
*** 3022,3029 ****
}
static void
! s_ltorg (ignored)
! int ignored ATTRIBUTE_UNUSED;
{
unsigned int entry;
literal_pool * pool;
--- 1551,1557 ----
}
static void
! s_ltorg (int ignored ATTRIBUTE_UNUSED)
{
unsigned int entry;
literal_pool * pool;
*************** s_ltorg (ignored)
*** 3068,3078 ****
/* Same as s_align_ptwo but align 0 => align 2. */
static void
! s_align (unused)
! int unused ATTRIBUTE_UNUSED;
{
! register int temp;
! register long temp_fill;
long max_alignment = 15;
temp = get_absolute_expression ();
--- 1596,1605 ----
/* Same as s_align_ptwo but align 0 => align 2. */
static void
! s_align (int unused ATTRIBUTE_UNUSED)
{
! int temp;
! long temp_fill;
long max_alignment = 15;
temp = get_absolute_expression ();
*************** s_align (unused)
*** 3104,3111 ****
}
static void
! s_force_thumb (ignore)
! int ignore ATTRIBUTE_UNUSED;
{
/* If we are not already in thumb mode go into it, EVEN if
the target processor does not support thumb instructions.
--- 1631,1637 ----
}
static void
! s_force_thumb (int ignore ATTRIBUTE_UNUSED)
{
/* If we are not already in thumb mode go into it, EVEN if
the target processor does not support thumb instructions.
*************** s_force_thumb (ignore)
*** 3123,3130 ****
}
static void
! s_thumb_func (ignore)
! int ignore ATTRIBUTE_UNUSED;
{
if (! thumb_mode)
opcode_select (16);
--- 1649,1655 ----
}
static void
! s_thumb_func (int ignore ATTRIBUTE_UNUSED)
{
if (! thumb_mode)
opcode_select (16);
*************** s_thumb_func (ignore)
*** 3140,3155 ****
being a thumb function. */
static void
! s_thumb_set (equiv)
! int equiv;
{
/* XXX the following is a duplicate of the code for s_set() in read.c
We cannot just call that code as we need to get at the symbol that
is created. */
! register char * name;
! register char delim;
! register char * end_name;
! register symbolS * symbolP;
/* Especial apologies for the random logic:
This just grew, and could be parsed much more simply!
--- 1665,1679 ----
being a thumb function. */
static void
! s_thumb_set (int equiv)
{
/* XXX the following is a duplicate of the code for s_set() in read.c
We cannot just call that code as we need to get at the symbol that
is created. */
! char * name;
! char delim;
! char * end_name;
! symbolS * symbolP;
/* Especial apologies for the random logic:
This just grew, and could be parsed much more simply!
*************** s_thumb_set (equiv)
*** 3189,3195 ****
if (listing & LISTING_SYMBOLS)
{
extern struct list_info_struct * listing_tail;
! fragS * dummy_frag = (fragS *) xmalloc (sizeof (fragS));
memset (dummy_frag, 0, sizeof (fragS));
dummy_frag->fr_type = rs_fill;
--- 1713,1719 ----
if (listing & LISTING_SYMBOLS)
{
extern struct list_info_struct * listing_tail;
! fragS * dummy_frag = xmalloc (sizeof (fragS));
memset (dummy_frag, 0, sizeof (fragS));
dummy_frag->fr_type = rs_fill;
*************** s_thumb_set (equiv)
*** 3230,3296 ****
}
static void
! opcode_select (width)
! int width;
! {
! switch (width)
! {
! case 16:
! if (! thumb_mode)
! {
! if (! (cpu_variant & ARM_EXT_V4T))
! as_bad (_("selected processor does not support THUMB opcodes"));
!
! thumb_mode = 1;
! /* No need to force the alignment, since we will have been
! coming from ARM mode, which is word-aligned. */
! record_alignment (now_seg, 1);
! }
! mapping_state (MAP_THUMB);
! break;
!
! case 32:
! if (thumb_mode)
! {
! if ((cpu_variant & ARM_ALL) == ARM_EXT_V4T)
! as_bad (_("selected processor does not support ARM opcodes"));
!
! thumb_mode = 0;
!
! if (!need_pass_2)
! frag_align (2, 0, 0);
!
! record_alignment (now_seg, 1);
! }
! mapping_state (MAP_ARM);
! break;
!
! default:
! as_bad (_("invalid instruction size selected (%d)"), width);
! }
! }
!
! static void
! s_arm (ignore)
! int ignore ATTRIBUTE_UNUSED;
{
opcode_select (32);
demand_empty_rest_of_line ();
}
static void
! s_thumb (ignore)
! int ignore ATTRIBUTE_UNUSED;
{
opcode_select (16);
demand_empty_rest_of_line ();
}
static void
! s_code (unused)
! int unused ATTRIBUTE_UNUSED;
{
! register int temp;
temp = get_absolute_expression ();
switch (temp)
--- 1754,1776 ----
}
static void
! s_arm (int ignore ATTRIBUTE_UNUSED)
{
opcode_select (32);
demand_empty_rest_of_line ();
}
static void
! s_thumb (int ignore ATTRIBUTE_UNUSED)
{
opcode_select (16);
demand_empty_rest_of_line ();
}
static void
! s_code (int unused ATTRIBUTE_UNUSED)
{
! int temp;
temp = get_absolute_expression ();
switch (temp)
*************** s_code (unused)
*** 3306,3313 ****
}
static void
! end_of_line (str)
! char *str;
{
skip_whitespace (str);
--- 1786,1792 ----
}
static void
! end_of_line (char * str)
{
skip_whitespace (str);
*************** end_of_line (str)
*** 3316,3323 ****
}
static int
! skip_past_comma (str)
! char ** str;
{
char * p = * str, c;
int comma = 0;
--- 1795,1801 ----
}
static int
! skip_past_comma (char ** str)
{
char * p = * str, c;
int comma = 0;
*************** skip_past_comma (str)
*** 3336,3350 ****
return comma ? SUCCESS : FAIL;
}
/* A standard register must be given at this point.
SHIFT is the place to put it in inst.instruction.
Restores input start point on error.
Returns the reg#, or FAIL. */
static int
! reg_required_here (str, shift)
! char ** str;
! int shift;
{
static char buff [128]; /* XXX */
int reg;
--- 1814,1900 ----
return comma ? SUCCESS : FAIL;
}
+ /* Return TRUE if anything in the expression is a bignum. */
+
+ static int
+ walk_no_bignums (symbolS * sp)
+ {
+ if (symbol_get_value_expression (sp)->X_op == O_big)
+ return 1;
+
+ if (symbol_get_value_expression (sp)->X_add_symbol)
+ {
+ return (walk_no_bignums (symbol_get_value_expression (sp)->X_add_symbol)
+ || (symbol_get_value_expression (sp)->X_op_symbol
+ && walk_no_bignums (symbol_get_value_expression (sp)->X_op_symbol)));
+ }
+
+ return 0;
+ }
+
+ static int in_my_get_expression = 0;
+
+ static int
+ my_get_expression (expressionS * ep, char ** str)
+ {
+ char * save_in;
+ segT seg;
+
+ save_in = input_line_pointer;
+ input_line_pointer = *str;
+ in_my_get_expression = 1;
+ seg = expression (ep);
+ in_my_get_expression = 0;
+
+ if (ep->X_op == O_illegal)
+ {
+ /* We found a bad expression in md_operand(). */
+ *str = input_line_pointer;
+ input_line_pointer = save_in;
+ return 1;
+ }
+
+ #ifdef OBJ_AOUT
+ if (seg != absolute_section
+ && seg != text_section
+ && seg != data_section
+ && seg != bss_section
+ && seg != undefined_section)
+ {
+ inst.error = _("bad_segment");
+ *str = input_line_pointer;
+ input_line_pointer = save_in;
+ return 1;
+ }
+ #endif
+
+ /* Get rid of any bignums now, so that we don't generate an error for which
+ we can't establish a line number later on. Big numbers are never valid
+ in instructions, which is where this routine is always called. */
+ if (ep->X_op == O_big
+ || (ep->X_add_symbol
+ && (walk_no_bignums (ep->X_add_symbol)
+ || (ep->X_op_symbol
+ && walk_no_bignums (ep->X_op_symbol)))))
+ {
+ inst.error = _("invalid constant");
+ *str = input_line_pointer;
+ input_line_pointer = save_in;
+ return 1;
+ }
+
+ *str = input_line_pointer;
+ input_line_pointer = save_in;
+ return 0;
+ }
+
/* A standard register must be given at this point.
SHIFT is the place to put it in inst.instruction.
Restores input start point on error.
Returns the reg#, or FAIL. */
static int
! reg_required_here (char ** str, int shift)
{
static char buff [128]; /* XXX */
int reg;
*************** reg_required_here (str, shift)
*** 3375,3384 ****
Returns the reg#, or FAIL. */
static int
! wreg_required_here (str, shift, reg_type)
! char ** str;
! int shift;
! enum wreg_type reg_type;
{
static char buff [128];
int reg;
--- 1925,1933 ----
Returns the reg#, or FAIL. */
static int
! wreg_required_here (char ** str,
! int shift,
! enum wreg_type reg_type)
{
static char buff [128];
int reg;
*************** wreg_required_here (str, shift, reg_type
*** 3420,3427 ****
}
static const struct asm_psr *
! arm_psr_parse (ccp)
! register char ** ccp;
{
char * start = * ccp;
char c;
--- 1969,1975 ----
}
static const struct asm_psr *
! arm_psr_parse (char ** ccp)
{
char * start = * ccp;
char c;
*************** arm_psr_parse (ccp)
*** 3463,3470 ****
/* Parse the input looking for a PSR flag. */
static int
! psr_required_here (str)
! char ** str;
{
char * start = * str;
const struct asm_psr * psr;
--- 2011,2017 ----
/* Parse the input looking for a PSR flag. */
static int
! psr_required_here (char ** str)
{
char * start = * str;
const struct asm_psr * psr;
*************** psr_required_here (str)
*** 3493,3500 ****
}
static int
! co_proc_number (str)
! char **str;
{
int proces