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Re: [PPC] add dcbzl opcode for PPC970


Alan Modra <amodra@bigpond.net.au> writes:

> I don't particularly like the use of XCMPL here, which is supposed to be
> "An X form comparison instruction".  I suppose you could change the name
> of the XCMPL macro and fix the comment.  Perhaps XOPL "An X form 
> instruction with the L bit specified".  OK with that change.

Committing the following revised patch:

2004-04-29  Ben Elliston  <bje@au.ibm.com>

	* ppc-opc.c (powerpc_opcodes): Add "dbczl" instruction for PPC970.

Index: opcodes/ppc-opc.c
===================================================================
RCS file: /cvs/src/src/opcodes/ppc-opc.c,v
retrieving revision 1.67
diff -u -p -r1.67 ppc-opc.c
--- opcodes/ppc-opc.c	16 Mar 2004 11:46:15 -0000	1.67
+++ opcodes/ppc-opc.c	30 Apr 2004 06:43:10 -0000
@@ -1585,15 +1585,14 @@ extract_tbr (unsigned long insn,
 /* An XRTRA_MASK, but with L bit clear.  */
 #define XRTLRA_MASK (XRTRA_MASK & ~((unsigned long) 1 << 21))
 
-/* An X form comparison instruction.  */
-#define XCMPL(op, xop, l) (X ((op), (xop)) | ((((unsigned long)(l)) & 1) << 21))
+/* An X form instruction with the L bit specified.  */
+#define XOPL(op, xop, l) (X ((op), (xop)) | ((((unsigned long)(l)) & 1) << 21))
 
 /* The mask for an X form comparison instruction.  */
 #define XCMP_MASK (X_MASK | (((unsigned long)1) << 22))
 
-/* The mask for an X form comparison instruction with the L field
-   fixed.  */
-#define XCMPL_MASK (XCMP_MASK | (((unsigned long)1) << 21))
+/* The mask for an X form instruction with the L field fixed.  */
+#define XOPL_MASK (XCMP_MASK | (((unsigned long)1) << 21))
 
 /* An X form trap instruction with the TO field specified.  */
 #define XTO(op, xop, to) (X ((op), (xop)) | ((((unsigned long)(to)) & 0x1f) << 21))
@@ -3146,10 +3145,10 @@ const struct powerpc_opcode powerpc_opco
 { "rldcr",   MDS(30,9,0), MDS_MASK,	PPC64,		{ RA, RS, RB, ME6 } },
 { "rldcr.",  MDS(30,9,1), MDS_MASK,	PPC64,		{ RA, RS, RB, ME6 } },
 
-{ "cmpw",    XCMPL(31,0,0), XCMPL_MASK, PPCCOM,		{ OBF, RA, RB } },
-{ "cmpd",    XCMPL(31,0,1), XCMPL_MASK, PPC64,		{ OBF, RA, RB } },
+{ "cmpw",    XOPL(31,0,0), XOPL_MASK, PPCCOM,		{ OBF, RA, RB } },
+{ "cmpd",    XOPL(31,0,1), XOPL_MASK, PPC64,		{ OBF, RA, RB } },
 { "cmp",     X(31,0),	XCMP_MASK,	PPC,		{ BF, L, RA, RB } },
-{ "cmp",     X(31,0),	XCMPL_MASK,	PWRCOM,		{ BF, RA, RB } },
+{ "cmp",     X(31,0),	XOPL_MASK,	PWRCOM,		{ BF, RA, RB } },
 
 { "twlgt",   XTO(31,4,TOLGT), XTO_MASK, PPCCOM,		{ RA, RB } },
 { "tlgt",    XTO(31,4,TOLGT), XTO_MASK, PWRCOM,		{ RA, RB } },
@@ -3252,10 +3251,10 @@ const struct powerpc_opcode powerpc_opco
 
 { "lwzxe",   X(31,31),	X_MASK,		BOOKE64,	{ RT, RA0, RB } },
 
-{ "cmplw",   XCMPL(31,32,0), XCMPL_MASK, PPCCOM,	{ OBF, RA, RB } },
-{ "cmpld",   XCMPL(31,32,1), XCMPL_MASK, PPC64,		{ OBF, RA, RB } },
+{ "cmplw",   XOPL(31,32,0), XOPL_MASK, PPCCOM,	{ OBF, RA, RB } },
+{ "cmpld",   XOPL(31,32,1), XOPL_MASK, PPC64,		{ OBF, RA, RB } },
 { "cmpl",    X(31,32),	XCMP_MASK,	 PPC,		{ BF, L, RA, RB } },
-{ "cmpl",    X(31,32),	XCMPL_MASK,	 PWRCOM,	{ BF, RA, RB } },
+{ "cmpl",    X(31,32),	XOPL_MASK,	 PWRCOM,	{ BF, RA, RB } },
 
 { "subf",    XO(31,40,0,0), XO_MASK,	PPC,		{ RT, RA, RB } },
 { "sub",     XO(31,40,0,0), XO_MASK,	PPC,		{ RT, RB, RA } },
@@ -4303,6 +4302,7 @@ const struct powerpc_opcode powerpc_opco
 
 { "tlbli",   X(31,1010), XRTRA_MASK,	PPC,		{ RB } },
 
+{ "dcbzl",   XOPL(31,1014,1), XRT_MASK,POWER4,            { RA, RB } },
 { "dcbz",    X(31,1014), XRT_MASK,	PPC,		{ RA, RB } },
 { "dclz",    X(31,1014), XRT_MASK,	PPC,		{ RA, RB } },
 
2004-04-30  Ben Elliston  <bje@au.ibm.com>

	* gas/ppc/power4.s: Add dcbz and dcbzl test cases.
	* gas/ppc/power4.d: Update accordingly.

Index: gas/testsuite/gas/ppc/power4.s
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/ppc/power4.s,v
retrieving revision 1.1
diff -u -p -r1.1 power4.s
--- gas/testsuite/gas/ppc/power4.s	4 Jul 2003 13:35:35 -0000	1.1
+++ gas/testsuite/gas/ppc/power4.s	30 Apr 2004 06:43:04 -0000
@@ -68,6 +68,10 @@ dsym1:
 	mfcr	3,0x40
 	mfcr	3,0x80
 
+	dcbz    1, 2
+	dcbzl   3, 4
+	dcbz    5, 6
+
 	.section	".data"
 usym0:	.llong	0xcafebabe
 usym1:
Index: gas/testsuite/gas/ppc/power4.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/ppc/power4.d,v
retrieving revision 1.2
diff -u -p -r1.2 power4.d
--- gas/testsuite/gas/ppc/power4.d	16 Mar 2004 00:58:42 -0000	1.2
+++ gas/testsuite/gas/ppc/power4.d	30 Apr 2004 06:43:04 -0000
@@ -10,7 +10,7 @@ start address 0x0+
 
 Sections:
 Idx Name +Size +VMA +LMA +File off +Algn
- +0 \.text +0+b8 +0+ +0+ +.*
+ +0 \.text +0+c4 +0+ +0+ +.*
  +CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE
  +1 \.data +0+10 +0+ +0+ +.*
  +CONTENTS, ALLOC, LOAD, DATA
@@ -99,3 +99,6 @@ Disassembly of section \.text:
  +ac:	7c 72 00 26 	mfcr    r3,32
  +b0:	7c 74 00 26 	mfcr    r3,64
  +b4:	7c 78 00 26 	mfcr    r3,128
+ +b8:	7c 01 17 ec 	dcbz    r1,r2
+ +bc:	7c 23 27 ec 	dcbzl   r3,r4
+ +c0:	7c 05 37 ec 	dcbz    r5,r6


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