Re: how to calculate opcode mask

[Ian Lance Taylor <ian at wasabisystems dot com>]

Shinpei Kato <shinny@j02.itscom.net> writes:

> I'm porting GAS to the new CPU that is similar to MIPS.
> So I'm refering to binutils-2.14/opcodes/mips-opc.c to add several new
> instructions.
> However I have one thing I can't understand.
> That is how I can caluculate a mask member of the type "mips_opcode".
> For instance, please see followings.
> 
> const struct mips_opcode mips_builtin_opcodes[] = 
> {
> 	:
> 	:
> {"add", "d,v,t", 0x00000020, 0xfc0007ff, WR_d|RD_s|RD_t, I1},
> 	:
> 	:
> }
> 
> This is the mips_builtin_opcodes definition in mips-opc.c.
> 0x0000000020 is a match member.
> 0x7c0007ff is a mask member.
> I can understand a match member because it's just opcode but not a mask
> member.
> 0xfc007ff means "d,v,t", doesn't it? But how can we calculate 0xfc0007ff
> from "d,v,t"?

The mask picks out the fixed bits in the instruction.  Any instruction
for which
    (insn & 0xfc0007ff) == 0x20
is the add instruction.

The assembler does not use the mask field in any significant way.  It
is the disassembler which uses the mask field.  It uses it to decide
which instruction it is looking at.

0xfc0007ff is closely related to "d,v,t", because the assembler will
use those codes to fill in the bits which are zero in 0xfc0007ff.  The
letter codes are defined in include/opcode/mips.h.  But I don't think
there is a one-to-one mapping between letter codes and the mask.

Ian