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Patch to remove L_*U from h8300 opcode table
- From: Richard Sandiford <rsandifo at redhat dot com>
- To: binutils at sources dot redhat dot com, gdb-patches at sources dot redhat dot com
- Cc: msnyder at redhat dot com, kazu at cs dot umass dot edu
- Date: 04 Jul 2003 11:22:45 +0100
- Subject: Patch to remove L_*U from h8300 opcode table
This patch removes the L_*U sizes from the h8300 opcode description.
It's mostly a clean-up, although it would also fix the same bug as:
http://sources.redhat.com/ml/gdb-patches/2003-07/msg00053.html
Before the h8sx stuff went in, all L_16|IMM operands were used in
word instructions and all L_8|IMMs were used in byte instructions.
The code that handled these operands therefore allowed both signed
and unsigned values.
However, the h8sx allows 32-bit instructions to have 16-bit immediates.
The immediate is then zero-extended, so -1 in:
mov.l #-1,er0
must not be treated as a 16-bit value.
As I understand it, the L_*U sizes were added to express this.
But they seem to have made the code more confusing (cf. the bug
linked above).
I think previous practice was to use L_* only to work out the
size of the operand field. Things like the MODE bits decided
how that field translated into the final operand value. Now,
everything that handles L_16 has to decide whether it should
also handle L_16U (and if so, how). It gives the impression
that there are more variations than there really are.
We already have a separate flag (NO_SYMBOLS) that indicates whether
an IMM operand is a short immediate. So I think it would be more
consistent to use L_16 and L_8 for all IMMs and (where necessary)
look at NO_SYMBOLS to decide whether an IMM is short or not.
[In fact, there only seems to be one place in the source code
where we care, namely gas/config/tc-h8300.c:get_specific().]
Tested on h8300-elf and h8300-coff (binutils & sim). I also tested
it with the WIP h8sx gcc port. Michael said he was OK with sim side
if tests passed.
OK to install?
Richard
include/h8300/
* h8300.h (L_8U, L_16U, IMM8U, IMM16U, IMM16ULIST): Remove.
(IMM8U_NS): Rename to IMM8_NS.
(IMM16U_NS): Rename to IMM16_NS.
(ABS16SRC, ABS16DST, ABS16OP3): Use L_16 rather than L_16U.
(ABS16LIST, DSTABS16LIST): Likewise.
(EXPAND_FROM_IMM16_L): Change IMM16U* to IMM16*.
(EXPAND_TWOOP_L): Likewise.
(h8_opcodes): Likewise. Change IMM8U* to IMM8*.
sim/h8300/
* compile.c (bitfrom): Remove L_16U handling.
(decode): Likewise.
opcodes/
* h8300-dis.c (print_colon_thingie): Remove L_16U handling.
(extract_immediate, print_one_arg, bfd_h8_disassemble): Likewise.
gas/
* tc-h8300.c (constant_fits_mode_p): Renamed from constant_fits_size_p.
Take an op_mode argument rather than a separate size and no_symbols
flag. Return false for NO_SYMBOLS if the operand is negative.
Remove L_8U and L_16U handling.
(get_specific): In the constant handling code, abort if a non-immediate
operand still has a zero size. Remove code for switching between L_16
and L_16U. Likewise L_8 and L_8U.
(do_a_fix_imm): Remove L_8U and L_16U handling.
Index: include/opcode/h8300.h
===================================================================
RCS file: /cvs/src/src/include/opcode/h8300.h,v
retrieving revision 1.18
diff -c -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.18 h8300.h
*** include/opcode/h8300.h 25 Jun 2003 15:31:57 -0000 1.18
--- include/opcode/h8300.h 4 Jul 2003 07:28:47 -0000
*************** enum h8_flags {
*** 34,42 ****
L_4 = 0x40,
L_5 = 0x50,
L_8 = 0x60,
- L_8U = 0x70,
L_16 = 0x80,
- L_16U = 0x90,
L_24 = 0xA0,
L_32 = 0xB0,
L_P = 0xC0,
--- 34,40 ----
*************** enum h8_flags {
*** 125,139 ****
IMM2 = IMM | L_2,
IMM8 = IMM | SRC | L_8,
- IMM8U = IMM | SRC | L_8U,
IMM16 = IMM | SRC | L_16,
- IMM16U = IMM | SRC | L_16U,
IMM32 = IMM | SRC | L_32,
IMM3NZ_NS = IMM3NZ | NO_SYMBOLS,
IMM4_NS = IMM4 | NO_SYMBOLS,
! IMM8U_NS = IMM8U | NO_SYMBOLS,
! IMM16U_NS = IMM16U | NO_SYMBOLS,
RD8 = DST | L_8 | REG,
RD16 = DST | L_16 | REG,
--- 123,135 ----
IMM2 = IMM | L_2,
IMM8 = IMM | SRC | L_8,
IMM16 = IMM | SRC | L_16,
IMM32 = IMM | SRC | L_32,
IMM3NZ_NS = IMM3NZ | NO_SYMBOLS,
IMM4_NS = IMM4 | NO_SYMBOLS,
! IMM8_NS = IMM8 | NO_SYMBOLS,
! IMM16_NS = IMM16 | NO_SYMBOLS,
RD8 = DST | L_8 | REG,
RD16 = DST | L_16 | REG,
*************** enum h8_flags {
*** 180,196 ****
SRCDISPREG = SRC | DISPREG,
ABS8SRC = SRC | ABS | L_8,
! ABS16SRC = SRC | ABS | L_16U,
ABS24SRC = SRC | ABS | L_24,
ABS32SRC = SRC | ABS | L_32,
ABS8DST = DST | ABS | L_8,
! ABS16DST = DST | ABS | L_16U,
ABS24DST = DST | ABS | L_24,
ABS32DST = DST | ABS | L_32,
ABS8OP3 = OP3 | ABS | L_8,
! ABS16OP3 = OP3 | ABS | L_16U,
ABS24OP3 = OP3 | ABS | L_24,
ABS32OP3 = OP3 | ABS | L_32,
--- 176,192 ----
SRCDISPREG = SRC | DISPREG,
ABS8SRC = SRC | ABS | L_8,
! ABS16SRC = SRC | ABS | L_16,
ABS24SRC = SRC | ABS | L_24,
ABS32SRC = SRC | ABS | L_32,
ABS8DST = DST | ABS | L_8,
! ABS16DST = DST | ABS | L_16,
ABS24DST = DST | ABS | L_24,
ABS32DST = DST | ABS | L_32,
ABS8OP3 = OP3 | ABS | L_8,
! ABS16OP3 = OP3 | ABS | L_16,
ABS24OP3 = OP3 | ABS | L_24,
ABS32OP3 = OP3 | ABS | L_32,
*************** #define DATA7 DATA, DATA, DATA, DATA,
*** 273,279 ****
#define IMM8LIST IMM8, DATA
#define IMM16LIST IMM16, DATA3
- #define IMM16ULIST IMM16U, DATA3
#define IMM24LIST IMM24, DATA5
#define IMM32LIST IMM32, DATA7
--- 269,274 ----
*************** #define DISP24LIST DISP | L_24, DATA5
*** 282,293 ****
#define DISP32LIST DISP | L_32, DATA7
#define ABS8LIST ABS | L_8, DATA
! #define ABS16LIST ABS | L_16U, DATA3
#define ABS24LIST ABS | L_24, DATA5
#define ABS32LIST ABS | L_32, DATA7
#define DSTABS8LIST DST | ABS | L_8, DATA
! #define DSTABS16LIST DST | ABS | L_16U, DATA3
#define DSTABS24LIST DST | ABS | L_24, DATA5
#define DSTABS32LIST DST | ABS | L_32, DATA7
--- 277,288 ----
#define DISP32LIST DISP | L_32, DATA7
#define ABS8LIST ABS | L_8, DATA
! #define ABS16LIST ABS | L_16, DATA3
#define ABS24LIST ABS | L_24, DATA5
#define ABS32LIST ABS | L_32, DATA7
#define DSTABS8LIST DST | ABS | L_8, DATA
! #define DSTABS16LIST DST | ABS | L_16, DATA3
#define DSTABS24LIST DST | ABS | L_24, DATA5
#define DSTABS32LIST DST | ABS | L_32, DATA7
*************** #define EXPAND_FROM_ABS32_W(CODE, NAME,
*** 822,831 ****
{CODE, AV_H8SX, 0, NAME, {{ABS32SRC, ABS32DST, E}}, {{PREFIX_6B35, ABS32LIST, TO_ABS32, OPCODE, IGNORE, DSTABS32LIST, E}}}
#define EXPAND_FROM_IMM16_L(CODE, NAME, OPCODE) \
! {CODE, AV_H8SX, 0, NAME, {{IMM16U_NS, RDIND, E}}, {{PREFIX_010E, TO_IND, OPCODE, B30 | IGNORE, IMM16ULIST, E}}}, \
! EXPAND2_STD_IMM (CODE, 2, NAME, IMM16U_NS, PREFIX_010E, OPCODE, B30 | IGNORE, IMM16ULIST), \
! {CODE, AV_H8SX, 0, NAME, {{IMM16U_NS, ABS16DST, E}}, {{PREFIX_010E, TO_ABS16, OPCODE, B30 | IGNORE, DSTABS16LIST, IMM16ULIST, E}}}, \
! {CODE, AV_H8SX, 0, NAME, {{IMM16U_NS, ABS32DST, E}}, {{PREFIX_010E, TO_ABS32, OPCODE, B30 | IGNORE, DSTABS32LIST, IMM16ULIST, E}}}
#define EXPAND_FROM_IMM32_L(CODE, NAME, OPCODE) \
{CODE, AV_H8SX, 0, NAME, {{IMM32, RDIND, E}}, {{PREFIX_010E, TO_IND, OPCODE, B31 | IGNORE, IMM32LIST, E}}}, \
--- 817,826 ----
{CODE, AV_H8SX, 0, NAME, {{ABS32SRC, ABS32DST, E}}, {{PREFIX_6B35, ABS32LIST, TO_ABS32, OPCODE, IGNORE, DSTABS32LIST, E}}}
#define EXPAND_FROM_IMM16_L(CODE, NAME, OPCODE) \
! {CODE, AV_H8SX, 0, NAME, {{IMM16_NS, RDIND, E}}, {{PREFIX_010E, TO_IND, OPCODE, B30 | IGNORE, IMM16LIST, E}}}, \
! EXPAND2_STD_IMM (CODE, 2, NAME, IMM16_NS, PREFIX_010E, OPCODE, B30 | IGNORE, IMM16LIST), \
! {CODE, AV_H8SX, 0, NAME, {{IMM16_NS, ABS16DST, E}}, {{PREFIX_010E, TO_ABS16, OPCODE, B30 | IGNORE, DSTABS16LIST, IMM16LIST, E}}}, \
! {CODE, AV_H8SX, 0, NAME, {{IMM16_NS, ABS32DST, E}}, {{PREFIX_010E, TO_ABS32, OPCODE, B30 | IGNORE, DSTABS32LIST, IMM16LIST, E}}}
#define EXPAND_FROM_IMM32_L(CODE, NAME, OPCODE) \
{CODE, AV_H8SX, 0, NAME, {{IMM32, RDIND, E}}, {{PREFIX_010E, TO_IND, OPCODE, B31 | IGNORE, IMM32LIST, E}}}, \
*************** #define EXPAND_TWOOP_W(CODE, NAME, OP1,
*** 883,890 ****
EXPAND_FROM_ABS32_W (CODE, NAME, OP3)
#define EXPAND_TWOOP_L(CODE, NAME, OP1) \
! {CODE, AV_H8SX, 0, NAME, {{IMM16U_NS, RD32, E}}, {{0x7, 0xa, OP1, B31 | RD32, IMM16ULIST, E}}}, \
! {CODE, AV_H8H, 6, NAME, {{IMM32, RD32, E}}, {{0x7, 0xa, OP1, B30 | RD32, IMM32LIST, E}}}, \
EXPAND_FROM_IMM16_L (CODE, NAME, OP1), \
EXPAND_FROM_IMM32_L (CODE, NAME, OP1), \
EXPAND_FROM_REG32 (CODE, NAME, OP1), \
--- 878,885 ----
EXPAND_FROM_ABS32_W (CODE, NAME, OP3)
#define EXPAND_TWOOP_L(CODE, NAME, OP1) \
! {CODE, AV_H8SX, 0, NAME, {{IMM16_NS, RD32, E}}, {{0x7, 0xa, OP1, B31 | RD32, IMM16LIST, E}}}, \
! {CODE, AV_H8H, 6, NAME, {{IMM32, RD32, E}}, {{0x7, 0xa, OP1, B30 | RD32, IMM32LIST, E}}}, \
EXPAND_FROM_IMM16_L (CODE, NAME, OP1), \
EXPAND_FROM_IMM32_L (CODE, NAME, OP1), \
EXPAND_FROM_REG32 (CODE, NAME, OP1), \
*************** struct h8_opcode h8_opcodes[] =
*** 1475,1481 ****
{O (O_MOV, SW), AV_H8SX, 0, "mov.w", {{IMM4_NS, ABS16DST, E}}, {{0x6, 0xb, 0xd, IMM4, DSTABS16LIST, E}}},
{O (O_MOV, SW), AV_H8SX, 0, "mov.w", {{IMM4_NS, ABS32DST, E}}, {{0x6, 0xb, 0xf, IMM4, DSTABS32LIST, E}}},
! MOVFROM_IMM8 (O (O_MOV, SW), PREFIX_015D, "mov.w", IMM8U_NS),
MOVFROM_IMM (O (O_MOV, SW), PREFIX_7974, "mov.w", IMM16, IMM16LIST),
{O (O_MOV, SW), AV_H8, 2, "mov.w", {{RS16, RD16, E}}, {{0x0, 0xD, RS16, RD16, E}}},
--- 1470,1476 ----
{O (O_MOV, SW), AV_H8SX, 0, "mov.w", {{IMM4_NS, ABS16DST, E}}, {{0x6, 0xb, 0xd, IMM4, DSTABS16LIST, E}}},
{O (O_MOV, SW), AV_H8SX, 0, "mov.w", {{IMM4_NS, ABS32DST, E}}, {{0x6, 0xb, 0xf, IMM4, DSTABS32LIST, E}}},
! MOVFROM_IMM8 (O (O_MOV, SW), PREFIX_015D, "mov.w", IMM8_NS),
MOVFROM_IMM (O (O_MOV, SW), PREFIX_7974, "mov.w", IMM16, IMM16LIST),
{O (O_MOV, SW), AV_H8, 2, "mov.w", {{RS16, RD16, E}}, {{0x0, 0xD, RS16, RD16, E}}},
*************** struct h8_opcode h8_opcodes[] =
*** 1501,1510 ****
{O (O_MOV, SL), AV_H8SX, 0, "mov.l", {{IMM3NZ_NS, RD32, E}}, {{0x0, 0xf, B31 | IMM3NZ, B31 | RD32, E}}},
! MOVFROM_IMM8 (O (O_MOV, SL), PREFIX_010D, "mov.l", IMM8U_NS),
! MOVFROM_IMM (O (O_MOV, SL), PREFIX_7A7C, "mov.l", IMM16U_NS, IMM16ULIST),
! {O (O_MOV, SL), AV_H8SX, 0, "mov.l", {{IMM16U_NS, RD32, E}}, {{0x7, 0xa, 0x0, B31 | RD32, IMM16ULIST, E}}},
{O (O_MOV, SL), AV_H8H, 4, "mov.l", {{IMM32, RD32, E}}, {{0x7, 0xa, 0x0, B30 | RD32, IMM32LIST, E}}},
MOVFROM_IMM (O (O_MOV, SL), PREFIX_7A74, "mov.l", IMM32, IMM32LIST),
--- 1496,1505 ----
{O (O_MOV, SL), AV_H8SX, 0, "mov.l", {{IMM3NZ_NS, RD32, E}}, {{0x0, 0xf, B31 | IMM3NZ, B31 | RD32, E}}},
! MOVFROM_IMM8 (O (O_MOV, SL), PREFIX_010D, "mov.l", IMM8_NS),
! MOVFROM_IMM (O (O_MOV, SL), PREFIX_7A7C, "mov.l", IMM16_NS, IMM16LIST),
! {O (O_MOV, SL), AV_H8SX, 0, "mov.l", {{IMM16_NS, RD32, E}}, {{0x7, 0xa, 0x0, B31 | RD32, IMM16LIST, E}}},
{O (O_MOV, SL), AV_H8H, 4, "mov.l", {{IMM32, RD32, E}}, {{0x7, 0xa, 0x0, B30 | RD32, IMM32LIST, E}}},
MOVFROM_IMM (O (O_MOV, SL), PREFIX_7A74, "mov.l", IMM32, IMM32LIST),
Index: sim/h8300/compile.c
===================================================================
RCS file: /cvs/src/src/sim/h8300/compile.c,v
retrieving revision 1.32
diff -c -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.32 compile.c
*** sim/h8300/compile.c 2 Jul 2003 19:04:58 -0000 1.32
--- sim/h8300/compile.c 4 Jul 2003 07:28:48 -0000
*************** bitfrom (int x)
*** 534,540 ****
case L_8:
return SB;
case L_16:
- case L_16U:
return SW;
case L_32:
return SL;
--- 534,539 ----
*************** decode (SIM_DESC sd, int addr, unsigned
*** 749,755 ****
cst[opnum] = UEXTCHAR (data[len / 2]);
break;
case L_16:
- case L_16U:
cst[opnum] = (data[len / 2] << 8) + data[len / 2 + 1];
break;
case L_32:
--- 748,753 ----
*************** decode (SIM_DESC sd, int addr, unsigned
*** 798,806 ****
cst[opnum] = (data[len / 2] << 8) + data[len / 2 + 1];
cst[opnum] = (short) cst[opnum]; /* Sign extend. */
break;
- case L_16U:
- cst[opnum] = (data[len / 2] << 8) + data[len / 2 + 1];
- break;
case L_32:
cst[opnum] =
(data[len / 2 + 0] << 24) +
--- 796,801 ----
*************** decode (SIM_DESC sd, int addr, unsigned
*** 814,825 ****
goto end;
}
}
! else if ((looking_for & SIZE) == L_16 ||
! (looking_for & SIZE) == L_16U)
{
cst[opnum] = (data[len / 2] << 8) + data[len / 2 + 1];
- if ((looking_for & SIZE) != L_16U)
- cst[opnum] = (short) cst[opnum]; /* Sign extend. */
}
else if (looking_for & ABSJMP)
{
--- 809,817 ----
goto end;
}
}
! else if ((looking_for & SIZE) == L_16)
{
cst[opnum] = (data[len / 2] << 8) + data[len / 2 + 1];
}
else if (looking_for & ABSJMP)
{
Index: opcodes/h8300-dis.c
===================================================================
RCS file: /cvs/src/src/opcodes/h8300-dis.c,v
retrieving revision 1.14
diff -c -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.14 h8300-dis.c
*** opcodes/h8300-dis.c 10 Jun 2003 07:27:55 -0000 1.14
--- opcodes/h8300-dis.c 4 Jul 2003 07:28:48 -0000
*************** print_colon_thingie (op_type *nib)
*** 57,64 ****
case L_4: fprintf (stdout, "4"); break;
case L_5: fprintf (stdout, "5"); break;
case L_8: fprintf (stdout, "8"); break;
! case L_16:
! case L_16U: fprintf (stdout, "16"); break;
case L_24: fprintf (stdout, "24"); break;
case L_32: fprintf (stdout, "32"); break;
}
--- 57,63 ----
case L_4: fprintf (stdout, "4"); break;
case L_5: fprintf (stdout, "5"); break;
case L_8: fprintf (stdout, "8"); break;
! case L_16: fprintf (stdout, "16"); break;
case L_24: fprintf (stdout, "24"); break;
case L_32: fprintf (stdout, "32"); break;
}
*************** extract_immediate (stream, looking_for,
*** 170,176 ****
*cst = data[0];
break;
case L_16:
- case L_16U:
*len = 16;
*cst = (data[0] << 8) + data [1];
#if 0
--- 169,174 ----
*************** print_one_arg (info, addr, x, cst, cstle
*** 252,258 ****
outfn (stream, "%s", regnames[rn]);
break;
case L_16:
- case L_16U:
outfn (stream, "%s", wregnames[rn]);
break;
case L_P:
--- 250,255 ----
*************** print_one_arg (info, addr, x, cst, cstle
*** 270,276 ****
outfn (stream, "%s.b", regnames[rn < 8 ? rn + 8 : rn]);
break;
case L_16:
- case L_16U:
/* Always take low half of reg. */
outfn (stream, "%s.w", wregnames[rn < 8 ? rn : rn - 8]);
break;
--- 267,272 ----
*************** print_one_arg (info, addr, x, cst, cstle
*** 318,325 ****
}
else if ((x & MODE) == PCREL)
{
! if ((x & SIZE) == L_16 ||
! (x & SIZE) == L_16U)
{
outfn (stream, ".%s%d (0x%x)",
(short) cst > 0 ? "+" : "",
--- 314,320 ----
}
else if ((x & MODE) == PCREL)
{
! if ((x & SIZE) == L_16)
{
outfn (stream, ".%s%d (0x%x)",
(short) cst > 0 ? "+" : "",
*************** bfd_h8_disassemble (addr, info, mach)
*** 578,585 ****
cst[opnr] = thisnib;
cstlen[opnr] = 4;
}
! else if ((looking_for & SIZE) == L_16 ||
! (looking_for & SIZE) == L_16U)
{
cst[opnr] = (data[len / 2]) * 256 + data[(len + 2) / 2];
cstlen[opnr] = 16;
--- 573,579 ----
cst[opnr] = thisnib;
cstlen[opnr] = 4;
}
! else if ((looking_for & SIZE) == L_16)
{
cst[opnr] = (data[len / 2]) * 256 + data[(len + 2) / 2];
cstlen[opnr] = 16;
Index: gas/config/tc-h8300.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-h8300.c,v
retrieving revision 1.33
diff -c -d -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.33 tc-h8300.c
*** gas/config/tc-h8300.c 25 Jun 2003 15:31:58 -0000 1.33
--- gas/config/tc-h8300.c 4 Jul 2003 07:28:48 -0000
*************** static int parse_reg PARAMS ((char *,
*** 347,353 ****
char * colonmod24 PARAMS ((struct h8_op *, char *));
static int constant_fits_width_p PARAMS ((struct h8_op *, unsigned int));
! static int constant_fits_size_p PARAMS ((struct h8_op *, int, int));
/*
parse operands
--- 347,353 ----
char * colonmod24 PARAMS ((struct h8_op *, char *));
static int constant_fits_width_p PARAMS ((struct h8_op *, unsigned int));
! static int constant_fits_mode_p PARAMS ((struct h8_op *, op_type));
/*
parse operands
*************** constant_fits_width_p (operand, width)
*** 580,594 ****
}
static int
! constant_fits_size_p (operand, size, no_symbols)
struct h8_op *operand;
! int size, no_symbols;
{
offsetT num = operand->exp.X_add_number;
! if (no_symbols
! && (operand->exp.X_add_symbol != 0 || operand->exp.X_op_symbol != 0))
return 0;
! switch (size)
{
case L_2:
return (num & ~3) == 0;
--- 580,598 ----
}
static int
! constant_fits_mode_p (operand, mode)
struct h8_op *operand;
! op_type mode;
{
offsetT num = operand->exp.X_add_number;
!
! if ((mode & NO_SYMBOLS) != 0
! && (operand->exp.X_add_symbol != 0
! || operand->exp.X_op_symbol != 0
! || num < 0))
return 0;
!
! switch (mode & SIZE)
{
case L_2:
return (num & ~3) == 0;
*************** constant_fits_size_p (operand, size, no_
*** 601,613 ****
case L_5:
return num >= 1 && num < 32;
case L_8:
! return (num & ~0xFF) == 0 || ((unsigned)num | 0x7F) == ~0u;
! case L_8U:
! return (num & ~0xFF) == 0;
case L_16:
! return (num & ~0xFFFF) == 0 || ((unsigned)num | 0x7FFF) == ~0u;
! case L_16U:
! return (num & ~0xFFFF) == 0;
case L_32:
return 1;
default:
--- 605,613 ----
case L_5:
return num >= 1 && num < 32;
case L_8:
! return (num >= -0x80 && num < 0x100);
case L_16:
! return (num >= -0x8000 && num < 0x10000);
case L_32:
return 1;
default:
*************** get_specific (instruction, operands, siz
*** 1285,1321 ****
|| op_mode == INDEXL)
&& op_mode == x_mode)
{
! /* Promote a L_24 to L_32 if it makes us match. */
! if (x_size == L_24 && op_size == L_32)
{
! x &= ~SIZE;
! x |= x_size = L_32;
! }
! #if 0 /* ??? */
! /* Promote an L8 to L_16 if it makes us match. */
! if ((op_mode == ABS || op_mode == DISP) && x_size == L_8)
! {
! if (op_size == L_16)
! x_size = L_16;
}
! #endif
! if (((x_size == L_16 && op_size == L_16U)
! || (x_size == L_8 && op_size == L_8U)
! || (x_size == L_3 && op_size == L_3NZ))
! /* We're deliberately more permissive for ABS modes. */
! && (op_mode == ABS
! || constant_fits_size_p (operands + i, op_size,
! op & NO_SYMBOLS)))
! x_size = op_size;
! if (x_size != 0 && op_size != x_size)
! found = 0;
! else if (x_size == 0
! && ! constant_fits_size_p (operands + i, op_size,
! op & NO_SYMBOLS))
! found = 0;
}
else if (op_mode != x_mode)
{
--- 1285,1313 ----
|| op_mode == INDEXL)
&& op_mode == x_mode)
{
! if (x_size == 0)
{
! /* Non-immediates should have been handled by
! fix_operand_size. */
! if (op_mode != IMM)
! abort ();
! if (!constant_fits_mode_p (operands + i, op))
! found = 0;
}
! else
! {
! /* Promote xx:24 to xx:32 if it makes us match. */
! if (x_size == L_24 && op_size == L_32)
! x_size = op_size;
! if (x_size == L_3 && op_size == L_3NZ)
! if (operands[i].exp.X_add_number != 0)
! x_size = op_size;
! if (op_size != x_size)
! found = 0;
! }
}
else if (op_mode != x_mode)
{
*************** do_a_fix_imm (offset, nibble, operand, r
*** 1438,1449 ****
bytes[0] |= operand->exp.X_add_number & 31;
break;
case L_8:
- case L_8U:
check_operand (operand, 0xff, t);
bytes[0] |= operand->exp.X_add_number;
break;
case L_16:
- case L_16U:
check_operand (operand, 0xffff, t);
bytes[0] |= operand->exp.X_add_number >> 8;
bytes[1] |= operand->exp.X_add_number >> 0;
--- 1430,1439 ----
*************** do_a_fix_imm (offset, nibble, operand, r
*** 1487,1493 ****
default:
as_bad (_("Can't work out size of operand.\n"));
case L_16:
- case L_16U:
size = 2;
where = 0;
if (relaxmode == 2)
--- 1477,1482 ----