Re: [PATCH] Performance counter opcodes for MIPS R1[02]000

[cgd at sibyte dot com]

dmj+@andrew.cmu.edu ("Daniel Jacobowitz") writes:
> On Thu, Jun 21, 2001 at 07:45:56AM +0200, Thiemo Seufer wrote:
> > cgd@sibyte.com wrote:
> > [snip]
> > > The selection of t0 for that register name, for a binary unmarked with
> > > ABI, is a change, and I don't understand why it's correct.
> > 
> > Ah, now I understand Your concern. I wasn't aware of the fact that
> > there are unmarked binaries. I thought the use of ABI-flags was
> > mandatory in ELF.
> 
> Nope.  Not only does, for instance, Linux/MIPS not use them - it would
> be ABI-noncompliant to use them, unless I misread the psABI.  Only
> noreorder, pic, cpic, and the four arch bits are defined for e_flags in
> o32.

the psABI version that you're talking about is the one at:

	http://www.sco.com/developer/devspecs/mipsabi.pdf

(MIPS RISC Processor Supplement 3rd Edition)?


Not only does it only define those e_flags bits, but it doesn't define
what the EF_MIPS_ARCH bits actually mean, and indicates that only
those with EF_MIPS_ARCH bits set to all 0 are ABI-compliant!

It also donsn't seem to provide much friendliness to little-endian
MIPS.  8-)



Really, it'd be great if people got together and worked through an
update for the MIPS ELF spec, for modern EF_MIPS_ARCH values and
additional flags (and did so in a way that brought the GNU tools, SGI,
and who knows else) under one roof, in a backward compatible way.

It's not clear that it'd be Good to try to define an updated version
of the SysV standard ABI for MIPS -- or at least, I wouldn't care to
try, maybe SGI would and should -- but at least the flags could/should
be unified.

I'd be willing to help in that, but I don't really even know where to
start, other than by staring at the bits.  8-)



chris