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[binutils-gdb] [AArch64] Fix bogus MOVPRFX warning for GPR form of CPY
- From: Richard Sandiford <rsandifo at sourceware dot org>
- To: bfd-cvs at sourceware dot org
- Date: 2 Jul 2019 09:53:32 -0000
- Subject: [binutils-gdb] [AArch64] Fix bogus MOVPRFX warning for GPR form of CPY
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=8941884429c305ad42a41f759a98c8cca4d4aacc
commit 8941884429c305ad42a41f759a98c8cca4d4aacc
Author: Richard Sandiford <richard.sandiford@arm.com>
Date: Tue Jul 2 10:51:05 2019 +0100
[AArch64] Fix bogus MOVPRFX warning for GPR form of CPY
One of the MOVPRFX tests has:
output register of preceding `movprfx' used as input at operand 3 -- `cpy z1.d,p1/m,x1'
But X1 and Z1 are not the same register, so the instruction is
actually OK.
2019-07-02 Richard Sandiford <richard.sandiford@arm.com>
opcodes/
* aarch64-opc.c (verify_constraints): Skip GPRs when scanning the
registers in an instruction prefixed by MOVPRFX.
gas/
* testsuite/gas/aarch64/sve-movprfx_25.s: Allow CPY Z1.D.P1/M,X1
to be prefixed by MOVPRFX.
* testsuite/gas/aarch64/sve-movprfx_25.d: Update accordingly.
* testsuite/gas/aarch64/sve-movprfx_25.l: Likewise.
Diff:
---
gas/ChangeLog | 7 +++++++
gas/testsuite/gas/aarch64/sve-movprfx_25.d | 2 +-
gas/testsuite/gas/aarch64/sve-movprfx_25.l | 1 -
gas/testsuite/gas/aarch64/sve-movprfx_25.s | 2 +-
opcodes/ChangeLog | 5 +++++
opcodes/aarch64-opc.c | 5 -----
6 files changed, 14 insertions(+), 8 deletions(-)
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 355de66..05537e2 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,10 @@
+2019-07-02 Richard Sandiford <richard.sandiford@arm.com>
+
+ * testsuite/gas/aarch64/sve-movprfx_25.s: Allow CPY Z1.D.P1/M,X1
+ to be prefixed by MOVPRFX.
+ * testsuite/gas/aarch64/sve-movprfx_25.d: Update accordingly.
+ * testsuite/gas/aarch64/sve-movprfx_25.l: Likewise.
+
2019-07-01 Nick Clifton <nickc@redhat.com>
PR 24748
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_25.d b/gas/testsuite/gas/aarch64/sve-movprfx_25.d
index 1573856..2b4f654 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_25.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_25.d
@@ -21,7 +21,7 @@ Disassembly of section .*:
[^:]+: 04d12461 movprfx z1.d, p1/m, z3.d
[^:]+: 05e8a441 mov z1.d, p1/m, x2
[^:]+: 04d12461 movprfx z1.d, p1/m, z3.d
-[^:]+: 05e8a421 mov z1.d, p1/m, x1 // note: output register of preceding `movprfx' used as input at operand 3
+[^:]+: 05e8a421 mov z1.d, p1/m, x1
[^:]+: 04d12461 movprfx z1.d, p1/m, z3.d
[^:]+: 05e08441 mov z1.d, p1/m, d2
[^:]+: 04d12461 movprfx z1.d, p1/m, z3.d
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_25.l b/gas/testsuite/gas/aarch64/sve-movprfx_25.l
index ec7e2db..259ad55 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_25.l
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_25.l
@@ -1,5 +1,4 @@
[^:]*: Assembler messages:
.*: Warning: predicate register differs from that in preceding `movprfx' at operand 2 -- `cpy z1.d,p9/m,#12'
.*: Warning: merging predicate expected due to preceding `movprfx' at operand 2 -- `cpy z1.d,p1/z,#12'
-.*: Warning: output register of preceding `movprfx' used as input at operand 3 -- `cpy z1.d,p1/m,x1'
.*: Warning: output register of preceding `movprfx' used as input at operand 3 -- `cpy z1.d,p1/m,d1'
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_25.s b/gas/testsuite/gas/aarch64/sve-movprfx_25.s
index 58124ce..0e64763 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_25.s
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_25.s
@@ -29,7 +29,7 @@ f:
movprfx z1.d, p1/m, z3.d
cpy z1.d, p1/m, x2
- /* Not OK, scalar but register z1 and x1 are architecturally the same. */
+ /* OK, scalar predicated, alias mov. */
movprfx z1.d, p1/m, z3.d
cpy z1.d, p1/m, x1
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 6f5fcdd..8b0da31 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2019-07-02 Richard Sandiford <richard.sandiford@arm.com>
+
+ * aarch64-opc.c (verify_constraints): Skip GPRs when scanning the
+ registers in an instruction prefixed by MOVPRFX.
+
2019-07-01 Matthew Malcomson <matthew.malcomson@arm.com>
* aarch64-asm.c (aarch64_encode_variant_using_iclass): Use new
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index 00ff94d..7ffec2d 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -4968,11 +4968,6 @@ verify_constraints (const struct aarch64_inst *inst,
case AARCH64_OPND_Vm:
case AARCH64_OPND_Sn:
case AARCH64_OPND_Sm:
- case AARCH64_OPND_Rn:
- case AARCH64_OPND_Rm:
- case AARCH64_OPND_Rn_SP:
- case AARCH64_OPND_Rt_SP:
- case AARCH64_OPND_Rm_SP:
if (inst_op.reg.regno == blk_dest.reg.regno)
{
num_op_used++;