This is the mail archive of the
binutils-cvs@sourceware.org
mailing list for the binutils project.
[binutils-gdb] cpu/or1k: Document no branch delay slot architectures and l.adrp
- From: Stafford Horne <shorne at sourceware dot org>
- To: bfd-cvs at sourceware dot org
- Date: 12 Jun 2019 21:18:50 -0000
- Subject: [binutils-gdb] cpu/or1k: Document no branch delay slot architectures and l.adrp
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=eb212c84a12bd0adb29792737ab2423d72c182f7
commit eb212c84a12bd0adb29792737ab2423d72c182f7
Author: Stafford Horne <shorne@gmail.com>
Date: Thu Jun 13 06:16:19 2019 +0900
cpu/or1k: Document no branch delay slot architectures and l.adrp
The 'nd' architectures did not mention what the 'nd' stands for.
Document that these mean 'no brach delay slot'.
cpu/ChangeLog:
yyyy-mm-dd Stafford Horne <shorne@gmail.com>
* or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
(l-adrp): Improve comment.
Diff:
---
cpu/ChangeLog | 5 +++++
cpu/or1k.cpu | 6 +++---
cpu/or1korbis.cpu | 2 +-
3 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/cpu/ChangeLog b/cpu/ChangeLog
index 7f141af..087e6c6 100644
--- a/cpu/ChangeLog
+++ b/cpu/ChangeLog
@@ -1,5 +1,10 @@
2019-06-13 Stafford Horne <shorne@gmail.com>
+ * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
+ (l-adrp): Improve comment.
+
+2019-06-13 Stafford Horne <shorne@gmail.com>
+
* or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
diff --git a/cpu/or1k.cpu b/cpu/or1k.cpu
index e1ae1b8..b796862 100644
--- a/cpu/or1k.cpu
+++ b/cpu/or1k.cpu
@@ -77,7 +77,7 @@
(define-mach
(name or32nd)
- (comment "Generic OpenRISC 1000 32-bit CPU")
+ (comment "Generic OpenRISC 1000 32-bit CPU with no branch delay slot")
(cpu or1k32bf)
(bfd-name "or1knd")
)
@@ -92,7 +92,7 @@
; OpenRISC 1200 - 32-bit or1k CPU implementation
(define-model
- (name or1200nd) (comment "OpenRISC 1200 model")
+ (name or1200nd) (comment "OpenRISC 1200 model with no branch delay slot")
(attrs NO-DELAY-SLOT)
(mach or32nd)
(unit u-exec "Execution Unit" () 1 1 () () () ())
@@ -120,7 +120,7 @@
(define-mach
(name or64nd)
- (comment "Generic OpenRISC 1000 ND 64-bit CPU")
+ (comment "Generic OpenRISC 1000 ND 64-bit CPU with no branch delay slot")
(cpu or1k64bf)
(bfd-name "or1k64nd")
)
diff --git a/cpu/or1korbis.cpu b/cpu/or1korbis.cpu
index 308f378..3741d4c 100644
--- a/cpu/or1korbis.cpu
+++ b/cpu/or1korbis.cpu
@@ -433,7 +433,7 @@
)
)
-(dni l-adrp "adrp reg/disp21"
+(dni l-adrp "load pc-relative page address"
((MACH ORBIS-MACHS))
"l.adrp $rD,${disp21}"
(+ OPC_ADRP rD disp21)