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[binutils-gdb] MIPS/gas: Reject $0 as source register for DAUI instruction


https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=cd4797ee054654160fe6c4b6fbecd636b7961e19

commit cd4797ee054654160fe6c4b6fbecd636b7961e19
Author: Faraz Shahbazker <fshahbazker@wavecomp.com>
Date:   Mon May 13 17:19:37 2019 -0700

    MIPS/gas: Reject $0 as source register for DAUI instruction
    
    The MIPS64R6 TRM requires that the source register for DAUI
    not be r0.
    
    [1] "MIPS Architecture for Programmers Volume II-A: The MIPS64
        Instruction Set Manual", Imagination Technologies Ltd., Document
        Number: MD00087, Revision 6.06, December 15, 2016, Section 3.2
        "Alphabetical List of Instructions", pp. 67-68.
    
    gas/
    	* testsuite/gas/mips/r6-branch-constraints.s: Rename to ...
    	* testsuite/gas/mips/r6-reg-constraints.s: this and add test
    	case for DAUI.
    	* testsuite/gas/mips/r6-branch-constraints.l: Rename to ...
    	* testsuite/gas/mips/r6-reg-constraints.l: this and add test
    	for DAUI.
    	* testsuite/gas/mips/mips.exp: Rename test from
    	r6-branch-constraints to r6-reg-constraints.
    
    opcodes/
    	* mips-opc.c (mips_builtin_opcodes): Change source register
    	constraint for DAUI.

Diff:
---
 gas/ChangeLog                                                 | 11 +++++++++++
 gas/testsuite/gas/mips/mips.exp                               |  2 +-
 .../mips/{r6-branch-constraints.l => r6-reg-constraints.l}    |  1 +
 .../mips/{r6-branch-constraints.s => r6-reg-constraints.s}    |  1 +
 opcodes/ChangeLog                                             |  5 +++++
 opcodes/mips-opc.c                                            |  2 +-
 6 files changed, 20 insertions(+), 2 deletions(-)

diff --git a/gas/ChangeLog b/gas/ChangeLog
index dfd5d6f..f25c2dc 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,14 @@
+2019-05-21  Faraz Shahbazker  <fshahbazker@wavecomp.com>
+
+	* testsuite/gas/mips/r6-branch-constraints.s: Rename to ...
+	* testsuite/gas/mips/r6-reg-constraints.s: this and add test
+	case for DAUI.
+	* testsuite/gas/mips/r6-branch-constraints.l: Rename to ...
+	* testsuite/gas/mips/r6-reg-constraints.l: this and add test
+	for DAUI.
+	* testsuite/gas/mips/mips.exp: Rename test from
+	r6-branch-constraints to r6-reg-constraints.
+
 2019-05-21  Andre Vieira  <andre.simoesdiasvieira@arm.com>
 
 	PR 24559
diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp
index c8ecd04..eaeb488 100644
--- a/gas/testsuite/gas/mips/mips.exp
+++ b/gas/testsuite/gas/mips/mips.exp
@@ -2074,7 +2074,7 @@ if { [istarget mips*-*-vxworks*] } {
     run_list_test_arches "r6-removed"	"-32" [mips_arch_list_matching mips32r6]
     run_list_test_arches "r6-64-removed"	[mips_arch_list_matching mips64r6]
 
-    run_list_test_arches "r6-branch-constraints"  "-32" \
+    run_list_test_arches "r6-reg-constraints"  "-32" \
 			[mips_arch_list_matching mips32r6]
 
     run_dump_test_arches "crc"		[mips_arch_list_matching mips32r6]
diff --git a/gas/testsuite/gas/mips/r6-branch-constraints.l b/gas/testsuite/gas/mips/r6-reg-constraints.l
similarity index 95%
rename from gas/testsuite/gas/mips/r6-branch-constraints.l
rename to gas/testsuite/gas/mips/r6-reg-constraints.l
index bdeea9f..c898073 100644
--- a/gas/testsuite/gas/mips/r6-branch-constraints.l
+++ b/gas/testsuite/gas/mips/r6-reg-constraints.l
@@ -23,3 +23,4 @@
 .*:23: Error: the source register must not be \$0 `bnec \$0,\$2,.'
 .*:24: Error: invalid operands `bnec \$2,\$0,.'
 .*:25: Error: invalid operands `bnec \$2,\$2,.'
+.*:26: Error: the source register must not be \$0 `daui \$2,\$0,1'
diff --git a/gas/testsuite/gas/mips/r6-branch-constraints.s b/gas/testsuite/gas/mips/r6-reg-constraints.s
similarity index 96%
rename from gas/testsuite/gas/mips/r6-branch-constraints.s
rename to gas/testsuite/gas/mips/r6-reg-constraints.s
index 62ca893..b29527c 100644
--- a/gas/testsuite/gas/mips/r6-branch-constraints.s
+++ b/gas/testsuite/gas/mips/r6-reg-constraints.s
@@ -23,3 +23,4 @@
 	bnec	    $0,$2,.
 	bnec	    $2,$0,.
 	bnec	    $2,$2,.
+	daui	    $2,$0,1
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 61adb8e4..7f061c2 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2019-05-21  Faraz Shahbazker  <fshahbazker@wavecomp.com>
+
+	* mips-opc.c (mips_builtin_opcodes): Change source register
+	constraint for DAUI.
+
 2019-05-20  Nick Clifton  <nickc@redhat.com>
 
 	* po/fr.po: Updated French translation.
diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c
index 69b16be..0483a04 100644
--- a/opcodes/mips-opc.c
+++ b/opcodes/mips-opc.c
@@ -3271,7 +3271,7 @@ const struct mips_opcode mips_builtin_opcodes[] =
 /* MIPS r6.  */
 {"aui",			"t,s,u",	0x3c000000, 0xfc000000,	WR_1|RD_2,		0,		I37,		0,	0 },
 {"auipc",		"s,u",		0xec1e0000, 0xfc1f0000, WR_1,			RD_pc,		I37,		0,	0 },
-{"daui",		"t,s,u",	0x74000000, 0xfc000000,	WR_1|RD_2,		0,		I37,		0,	0 },
+{"daui",		"t,-s,u",	0x74000000, 0xfc000000,	WR_1|RD_2,		0,		I37,		0,	0 },
 {"dahi",		"s,-d,u",	0x04060000, 0xfc1f0000,	MOD_1,			0,		I69,		0,	0 },
 {"dati",		"s,-d,u",	0x041e0000, 0xfc1f0000,	MOD_1,			0,		I69,		0,	0 },


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