[binutils-gdb] Allow bit-patterns in the immediate field of ARM neon mov instructions.

[Nick Clifton <nickc at sourceware dot org>]

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=4ef4710f5c3e417dc43057e10d7675699bb38431

commit 4ef4710f5c3e417dc43057e10d7675699bb38431
Author: Nick Clifton <nickc@redhat.com>
Date:   Fri Jul 13 11:46:44 2018 +0100

    Allow bit-patterns in the immediate field of ARM neon mov instructions.
    
    	* config/tc-arm.c (do_neon_mov): When converting an integer
    	immediate into a floating point value, check that the conversion
    	is valid.  Also warn if the immediate is valid as both a floating
    	point value and a bit pattern.
    	* testsuite/gas/arm/vfp-mov-enc.s: Add instructions that use
    	floating point bit patterns.
    	* testsuite/gas/arm/vfp-mov-enc.d: Add regexps for the disassembly
    	of the new insns.

Diff:
---
 gas/ChangeLog                       | 11 +++++++++++
 gas/config/tc-arm.c                 | 19 +++++++++++++++----
 gas/testsuite/gas/arm/vfp-mov-enc.d |  3 +++
 gas/testsuite/gas/arm/vfp-mov-enc.s |  4 ++++
 4 files changed, 33 insertions(+), 4 deletions(-)

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 166c566..a0406ce 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,14 @@
+2018-07-13  Nick Clifton  <nickc@redhat.com>
+
+	* config/tc-arm.c (do_neon_mov): When converting an integer
+	immediate into a floating point value, check that the conversion
+	is valid.  Also warn if the immediate is valid as both a floating
+	point value and a bit pattern.
+	* testsuite/gas/arm/vfp-mov-enc.s: Add instructions that use
+	floating point bit patterns.
+	* testsuite/gas/arm/vfp-mov-enc.d: Add regexps for the disassembly
+	of the new insns.
+
 2018-07-12  Sudakshina Das  <sudi.das@arm.com>
 
 	* testsuite/gas/aarch64/system.s: Add test for ssbb
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index 9f3988a..3f5384e 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -16692,13 +16692,24 @@ do_neon_mov (void)
     case NS_HI:
     case NS_FI:  /* case 10 (fconsts).  */
       ldconst = "fconsts";
-      encode_fconstd:
+    encode_fconstd:
       if (!inst.operands[1].immisfloat)
 	{
+	  unsigned new_imm;
 	  /* Immediate has to fit in 8 bits so float is enough.  */
-	  float imm = (float)inst.operands[1].imm;
-	  memcpy (&inst.operands[1].imm, &imm, sizeof (float));
-	  inst.operands[1].immisfloat = 1;
+	  float imm = (float) inst.operands[1].imm;
+	  memcpy (&new_imm, &imm, sizeof (float));
+	  /* But the assembly may have been written to provide an integer
+	     bit pattern that equates to a float, so check that the
+	     conversion has worked.  */
+	  if (is_quarter_float (new_imm))
+	    {
+	      if (is_quarter_float (inst.operands[1].imm))
+		as_warn (_("immediate constant is valid both as a bit-pattern and a floating point value (using the fp value)"));
+
+	      inst.operands[1].imm = new_imm;
+	      inst.operands[1].immisfloat = 1;
+	    }
 	}
 
       if (is_quarter_float (inst.operands[1].imm))
diff --git a/gas/testsuite/gas/arm/vfp-mov-enc.d b/gas/testsuite/gas/arm/vfp-mov-enc.d
index 5c4b266..fda47f2 100644
--- a/gas/testsuite/gas/arm/vfp-mov-enc.d
+++ b/gas/testsuite/gas/arm/vfp-mov-enc.d
@@ -11,3 +11,6 @@ Disassembly of section .text:
 0[0-9a-f]+ <[^>]+> 4ef7da00 	vmovmi.f32	s27, #112	; 0x3f800000  1.0
 0[0-9a-f]+ <[^>]+> cebb1b04 	vmovgt.f64	d1, #180	; 0xc1a00000 -20.0
 0[0-9a-f]+ <[^>]+> ceb81b00 	vmovgt.f64	d1, #128	; 0xc0000000 -2.0
+0[0-9a-f]+ <[^>]+> eef0aa00 	vmov.f32	s21, #0	; 0x40000000  2.0
+0[0-9a-f]+ <[^>]+> eef97a07 	vmov.f32	s15, #151	; 0xc0b80000 -5.750
+0[0-9a-f]+ <[^>]+> eefc4a05 	vmov.f32	s9, #197	; 0xbe280000 -0.1640625
diff --git a/gas/testsuite/gas/arm/vfp-mov-enc.s b/gas/testsuite/gas/arm/vfp-mov-enc.s
index 4362fb1..049f46b 100644
--- a/gas/testsuite/gas/arm/vfp-mov-enc.s
+++ b/gas/testsuite/gas/arm/vfp-mov-enc.s
@@ -4,3 +4,7 @@ VMOVMI.F32 s27,#1
 VMOVMI.F32 s27,#1.0
 VMOVGT.F64 d1,#-20
 VMOVGT.F64 d1,#-2
+	@ Check that integer-encoded floating-point bit-patterns still work
+	vmov s21,#0x40000000
+	vmov s15,#0xc0b80000
+	vmov  s9,#0xbe280000