This is the mail archive of the
binutils-cvs@sourceware.org
mailing list for the binutils project.
[binutils-gdb] x86/Intel: accept "oword ptr" for INVPCID
- From: Jan Beulich <jbeulich at sourceware dot org>
- To: bfd-cvs at sourceware dot org
- Date: 1 Jun 2018 06:41:35 -0000
- Subject: [binutils-gdb] x86/Intel: accept "oword ptr" for INVPCID
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=647957107595c7f8209686577739240b7a222aba
commit 647957107595c7f8209686577739240b7a222aba
Author: Jan Beulich <jbeulich@novell.com>
Date: Fri Jun 1 08:37:24 2018 +0200
x86/Intel: accept "oword ptr" for INVPCID
The insn is no different in this reagrd from INVEPT and INVVPID.
Diff:
---
gas/ChangeLog | 10 ++++++++++
gas/testsuite/gas/i386/invpcid-intel.d | 1 +
gas/testsuite/gas/i386/invpcid.d | 1 +
gas/testsuite/gas/i386/invpcid.s | 1 +
gas/testsuite/gas/i386/x86-64-invpcid-intel.d | 1 +
gas/testsuite/gas/i386/x86-64-invpcid.d | 1 +
gas/testsuite/gas/i386/x86-64-invpcid.s | 1 +
opcodes/ChangeLog | 5 +++++
opcodes/i386-opc.tbl | 4 ++--
opcodes/i386-tbl.h | 8 ++++----
10 files changed, 27 insertions(+), 6 deletions(-)
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 93dc1c7..14f03bc 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,13 @@
+2018-06-01 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/invpcid.s,
+ testsuite/gas/i386/x86-64-invpcid.s: Add test with explicit
+ "oword ptr".
+ * testsuite/gas/i386/invpcid.d,
+ testsuite/gas/i386/invpcid-intel.d,
+ testsuite/gas/i386/x86-64-invpcid.d,
+ testsuite/gas/i386/x86-64-invpcid-intel.d: Adjust expectations.
+
2018-05-30 Amit Pawar <amit.pawar@amd.com>
* config/tc-i386.c (cpu_flag_init): Add CPU_ZNVER2_FLAGS.
diff --git a/gas/testsuite/gas/i386/invpcid-intel.d b/gas/testsuite/gas/i386/invpcid-intel.d
index f0b4dc9..8d1b5a9 100644
--- a/gas/testsuite/gas/i386/invpcid-intel.d
+++ b/gas/testsuite/gas/i386/invpcid-intel.d
@@ -11,4 +11,5 @@ Disassembly of section .text:
0+ <foo>:
[ ]*[a-f0-9]+: 66 0f 38 82 10 invpcid edx,\[eax\]
[ ]*[a-f0-9]+: 66 0f 38 82 10 invpcid edx,\[eax\]
+[ ]*[a-f0-9]+: 66 0f 38 82 10 invpcid edx,\[eax\]
#pass
diff --git a/gas/testsuite/gas/i386/invpcid.d b/gas/testsuite/gas/i386/invpcid.d
index 3ebd202..3619e59 100644
--- a/gas/testsuite/gas/i386/invpcid.d
+++ b/gas/testsuite/gas/i386/invpcid.d
@@ -10,4 +10,5 @@ Disassembly of section .text:
0+ <foo>:
[ ]*[a-f0-9]+: 66 0f 38 82 10 invpcid \(%eax\),%edx
[ ]*[a-f0-9]+: 66 0f 38 82 10 invpcid \(%eax\),%edx
+[ ]*[a-f0-9]+: 66 0f 38 82 10 invpcid \(%eax\),%edx
#pass
diff --git a/gas/testsuite/gas/i386/invpcid.s b/gas/testsuite/gas/i386/invpcid.s
index 9f12731..32067cb 100644
--- a/gas/testsuite/gas/i386/invpcid.s
+++ b/gas/testsuite/gas/i386/invpcid.s
@@ -6,3 +6,4 @@ foo:
.intel_syntax noprefix
invpcid edx,[eax]
+ invpcid edx,oword ptr [eax]
diff --git a/gas/testsuite/gas/i386/x86-64-invpcid-intel.d b/gas/testsuite/gas/i386/x86-64-invpcid-intel.d
index 35dc9e9..94a78617 100644
--- a/gas/testsuite/gas/i386/x86-64-invpcid-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-invpcid-intel.d
@@ -11,4 +11,5 @@ Disassembly of section .text:
0+ <foo>:
[ ]*[a-f0-9]+: 66 0f 38 82 10 invpcid rdx,\[rax\]
[ ]*[a-f0-9]+: 66 0f 38 82 10 invpcid rdx,\[rax\]
+[ ]*[a-f0-9]+: 66 0f 38 82 10 invpcid rdx,\[rax\]
#pass
diff --git a/gas/testsuite/gas/i386/x86-64-invpcid.d b/gas/testsuite/gas/i386/x86-64-invpcid.d
index af0fc4a..7a3101a 100644
--- a/gas/testsuite/gas/i386/x86-64-invpcid.d
+++ b/gas/testsuite/gas/i386/x86-64-invpcid.d
@@ -10,4 +10,5 @@ Disassembly of section .text:
0+ <foo>:
[ ]*[a-f0-9]+: 66 0f 38 82 10 invpcid \(%rax\),%rdx
[ ]*[a-f0-9]+: 66 0f 38 82 10 invpcid \(%rax\),%rdx
+[ ]*[a-f0-9]+: 66 0f 38 82 10 invpcid \(%rax\),%rdx
#pass
diff --git a/gas/testsuite/gas/i386/x86-64-invpcid.s b/gas/testsuite/gas/i386/x86-64-invpcid.s
index 89dd211..5db90af 100644
--- a/gas/testsuite/gas/i386/x86-64-invpcid.s
+++ b/gas/testsuite/gas/i386/x86-64-invpcid.s
@@ -6,3 +6,4 @@ foo:
.intel_syntax noprefix
invpcid rdx,[rax]
+ invpcid rdx,oword ptr [rax]
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 725bf15..3cc3f99 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2018-06-01 Jan Beulich <jbeulich@suse.com>
+
+ * i386-opc.tbl (invpcid): Add Oword.
+ * i386-tbl.h: Re-generate.
+
2018-06-01 Alan Modra <amodra@gmail.com>
* sysdep.h (_bfd_error_handler): Don't declare.
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index 201586c..fe2e626 100644
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -1583,8 +1583,8 @@ invvpid, 2, 0x660f3881, None, 3, CpuEPT|Cpu64, Modrm|IgnoreSize|No_bSuf|No_wSuf|
// INVPCID instruction
-invpcid, 2, 0x660f3882, None, 3, CpuINVPCID|CpuNo64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_qSuf|No_sSuf|No_ldSuf, { Unspecified|BaseIndex, Reg32 }
-invpcid, 2, 0x660f3882, None, 3, CpuINVPCID|Cpu64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_qSuf|No_sSuf|No_ldSuf|NoRex64, { Unspecified|BaseIndex, Reg64 }
+invpcid, 2, 0x660f3882, None, 3, CpuINVPCID|CpuNo64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_qSuf|No_sSuf|No_ldSuf, { Oword|Unspecified|BaseIndex, Reg32 }
+invpcid, 2, 0x660f3882, None, 3, CpuINVPCID|Cpu64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_qSuf|No_sSuf|No_ldSuf|NoRex64, { Oword|Unspecified|BaseIndex, Reg64 }
// SSSE3 instructions.
diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h
index 23643fc..78eef83 100644
--- a/opcodes/i386-tbl.h
+++ b/opcodes/i386-tbl.h
@@ -20804,12 +20804,12 @@ const insn_template i386_optab[] =
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 1, 0 } },
- { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1,
+ { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1,
1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0 },
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0,
- 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
+ 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0,
0, 0, 0 } },
{ { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -20821,12 +20821,12 @@ const insn_template i386_optab[] =
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 1, 0, 0 } },
- { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1,
+ { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1,
1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0 },
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1,
- 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
+ 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0,
0, 0, 0 } },
{ { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0,