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https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=c8d59609b1cf66eaff3c486e483f5e3d647c66ff
commit c8d59609b1cf66eaff3c486e483f5e3d647c66ff
Author: Nick Clifton <nickc@redhat.com>
Date: Wed Mar 28 09:44:45 2018 +0100
Enhance the AARCH64 assembler to support LDFF1xx instructions which use REG+REG addressing with an assumed offset register.
PR 22988
opcode * opcode/aarch64.h (enum aarch64_opnd): Add
AARCH64_OPND_SVE_ADDR_R.
opcodes * aarch64-tbl.h (aarch64_opcode_table): Add entries for LDFF1xx
instructions with only a base address register.
* aarch64-opc.c (operand_general_constraint_met_p): Add code to
handle AARHC64_OPND_SVE_ADDR_R.
(aarch64_print_operand): Likewise.
* aarch64-asm-2.c: Regenerate.
* aarch64_dis-2.c: Regenerate.
* aarch64-opc-2.c: Regenerate.
gas * config/tc-aarch64.c (parse_operands): Add code to handle
AARCH64_OPN_SVE_ADDR_R.
* testsuite/gas/aarch64/sve.s: Add tests for LDFF1xx instructions
with an assumed XZR offset address register.
* testsuite/gas/aarch64/sve.d: Update expected disassembly.
Diff:
---
gas/ChangeLog | 9 +
gas/config/tc-aarch64.c | 20 +
gas/testsuite/gas/aarch64/sve.d | 15 +
gas/testsuite/gas/aarch64/sve.s | 23 +
include/ChangeLog | 6 +
include/opcode/aarch64.h | 1 +
opcodes/ChangeLog | 12 +
opcodes/aarch64-asm-2.c | 113 ++---
opcodes/aarch64-dis-2.c | 1063 ++++++++++++++++++++-------------------
opcodes/aarch64-opc-2.c | 1 +
opcodes/aarch64-opc.c | 2 +
opcodes/aarch64-tbl.h | 26 +
12 files changed, 720 insertions(+), 571 deletions(-)
diff --git a/gas/ChangeLog b/gas/ChangeLog
index e1488d3..0df61ed 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,12 @@
+2018-03-28 Nick Clifton <nickc@redhat.com>
+
+ PR 22988
+ * config/tc-aarch64.c (parse_operands): Add code to handle
+ AARCH64_OPN_SVE_ADDR_R.
+ * testsuite/gas/aarch64/sve.s: Add tests for LDFF1xx instructions
+ with an assumed XZR offset address register.
+ * testsuite/gas/aarch64/sve.d: Update expected disassembly.
+
2018-03-22 Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (check_VecOperands): Latch
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 3a0cde9..e857f29 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -3695,6 +3695,7 @@ parse_address_main (char **str, aarch64_opnd_info *operand,
set_syntax_error (_("missing offset in the pre-indexed address"));
return FALSE;
}
+
operand->addr.preind = 1;
inst.reloc.exp.X_op = O_constant;
inst.reloc.exp.X_add_number = 0;
@@ -6233,6 +6234,25 @@ parse_operands (char *str, const aarch64_opcode *opcode)
info->addr.offset.imm = inst.reloc.exp.X_add_number;
break;
+ case AARCH64_OPND_SVE_ADDR_R:
+ /* [<Xn|SP>{, <R><m>}]
+ but recognizing SVE registers. */
+ po_misc_or_fail (parse_sve_address (&str, info, &base_qualifier,
+ &offset_qualifier));
+ if (offset_qualifier == AARCH64_OPND_QLF_NIL)
+ {
+ offset_qualifier = AARCH64_OPND_QLF_X;
+ info->addr.offset.is_reg = 1;
+ info->addr.offset.regno = 31;
+ }
+ else if (base_qualifier != AARCH64_OPND_QLF_X
+ || offset_qualifier != AARCH64_OPND_QLF_X)
+ {
+ set_syntax_error (_("invalid addressing mode"));
+ goto failure;
+ }
+ goto regoff_addr;
+
case AARCH64_OPND_SVE_ADDR_RR:
case AARCH64_OPND_SVE_ADDR_RR_LSL1:
case AARCH64_OPND_SVE_ADDR_RR_LSL2:
diff --git a/gas/testsuite/gas/aarch64/sve.d b/gas/testsuite/gas/aarch64/sve.d
index 5c7c519..4592891 100644
--- a/gas/testsuite/gas/aarch64/sve.d
+++ b/gas/testsuite/gas/aarch64/sve.d
@@ -40562,3 +40562,18 @@ Disassembly of section .*:
.*: 0e431441 fadd v1\.4h, v2\.4h, v3\.4h
.*: 4e401400 fadd v0\.8h, v0\.8h, v0\.8h
.*: 4e431441 fadd v1\.8h, v2\.8h, v3\.8h
+
+.*: a41f6400 ldff1b \{z0\.b\}, p1/z, \[x0, xzr\]
+.*: a43f6420 ldff1b \{z0\.h\}, p1/z, \[x1, xzr\]
+.*: a45f6440 ldff1b \{z0\.s\}, p1/z, \[x2, xzr\]
+.*: a47f6460 ldff1b \{z0\.d\}, p1/z, \[x3, xzr\]
+.*: a5ff6000 ldff1d \{z0\.d\}, p0/z, \[x0, xzr, lsl #3\]
+.*: a4bf6520 ldff1h \{z0\.h\}, p1/z, \[x9, xzr, lsl #1\]
+.*: a4df6540 ldff1h \{z0\.s\}, p1/z, \[x10, xzr, lsl #1\]
+.*: a4ff6560 ldff1h \{z0\.d\}, p1/z, \[x11, xzr, lsl #1\]
+.*: a5bf65c0 ldff1sb \{z0\.s\}, p1/z, \[x14, xzr\]
+.*: a59f65e0 ldff1sb \{z0\.d\}, p1/z, \[x15, xzr\]
+.*: a53f6640 ldff1sh \{z0\.s\}, p1/z, \[x18, xzr, lsl #1\]
+.*: a51f6660 ldff1sh \{z0\.d\}, p1/z, \[x19, xzr, lsl #1\]
+.*: a49f66e0 ldff1sw \{z0\.d\}, p1/z, \[x23, xzr, lsl #2\]
+.*: a57f6760 ldff1w \{z0\.d\}, p1/z, \[x27, xzr, lsl #2\]
diff --git a/gas/testsuite/gas/aarch64/sve.s b/gas/testsuite/gas/aarch64/sve.s
index 2130b0d..3dbf486 100644
--- a/gas/testsuite/gas/aarch64/sve.s
+++ b/gas/testsuite/gas/aarch64/sve.s
@@ -40540,3 +40540,26 @@
ORN Z0.D, Z0.D, #0X1
.include "advsimd-compnum.s"
+
+ # PR 22988 - check that [Rn] is equivalent to [Rn,xzr]
+ ldff1b z0.b, p1/z, [x0]
+ ldff1b z0.h, p1/z, [x1]
+ ldff1b z0.s, p1/z, [x2]
+ ldff1b z0.d, p1/z, [x3]
+
+ ldff1d z0.d, p0/z, [x0]
+
+ ldff1h z0.h, p1/z, [x9]
+ ldff1h z0.s, p1/z, [x10]
+ ldff1h z0.d, p1/z, [x11]
+
+ ldff1sb z0.s, p1/z, [x14]
+ ldff1sb z0.d, p1/z, [x15]
+
+ ldff1sh z0.s, p1/z, [x18]
+ ldff1sh z0.d, p1/z, [x19]
+
+ ldff1sw z0.d, p1/z, [x23]
+
+ ldff1w z0.d, p1/z, [x27]
+
diff --git a/include/ChangeLog b/include/ChangeLog
index 448c6e3..f7f4655 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,9 @@
+2018-03-28 Nick Clifton <nickc@redhat.com>
+
+ PR 22988
+ * opcode/aarch64.h (enum aarch64_opnd): Add
+ AARCH64_OPND_SVE_ADDR_R.
+
2018-03-21 H.J. Lu <hongjiu.lu@intel.com>
* elf/common.h (DF_1_KMOD): New.
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index a94d779..16c41bf 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -272,6 +272,7 @@ enum aarch64_opnd
AARCH64_OPND_SVE_ADDR_RI_U6x2, /* SVE [<Xn|SP>, #<uimm6>*2]. */
AARCH64_OPND_SVE_ADDR_RI_U6x4, /* SVE [<Xn|SP>, #<uimm6>*4]. */
AARCH64_OPND_SVE_ADDR_RI_U6x8, /* SVE [<Xn|SP>, #<uimm6>*8]. */
+ AARCH64_OPND_SVE_ADDR_R, /* SVE [<Xn|SP>]. */
AARCH64_OPND_SVE_ADDR_RR, /* SVE [<Xn|SP>, <Xm|XZR>]. */
AARCH64_OPND_SVE_ADDR_RR_LSL1, /* SVE [<Xn|SP>, <Xm|XZR>, LSL #1]. */
AARCH64_OPND_SVE_ADDR_RR_LSL2, /* SVE [<Xn|SP>, <Xm|XZR>, LSL #2]. */
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index ed7bb97..584aeb8 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,15 @@
+2018-03-28 Nick Clifton <nickc@redhat.com>
+
+ PR 22988
+ * aarch64-tbl.h (aarch64_opcode_table): Add entries for LDFF1xx
+ instructions with only a base address register.
+ * aarch64-opc.c (operand_general_constraint_met_p): Add code to
+ handle AARHC64_OPND_SVE_ADDR_R.
+ (aarch64_print_operand): Likewise.
+ * aarch64-asm-2.c: Regenerate.
+ * aarch64_dis-2.c: Regenerate.
+ * aarch64-opc-2.c: Regenerate.
+
2018-03-22 Jan Beulich <jbeulich@suse.com>
* i386-opc.tbl: Drop VecESize from register only insn forms and
diff --git a/opcodes/aarch64-asm-2.c b/opcodes/aarch64-asm-2.c
index 6634893..7987384 100644
--- a/opcodes/aarch64-asm-2.c
+++ b/opcodes/aarch64-asm-2.c
@@ -454,7 +454,7 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
case 1177: /* sys */
value = 1177; /* --> sys. */
break;
- case 1974: /* bic */
+ case 1990: /* bic */
case 1240: /* and */
value = 1240; /* --> and. */
break;
@@ -466,19 +466,19 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
case 1243: /* ands */
value = 1243; /* --> ands. */
break;
- case 1975: /* cmple */
+ case 1991: /* cmple */
case 1278: /* cmpge */
value = 1278; /* --> cmpge. */
break;
- case 1978: /* cmplt */
+ case 1994: /* cmplt */
case 1281: /* cmpgt */
value = 1281; /* --> cmpgt. */
break;
- case 1976: /* cmplo */
+ case 1992: /* cmplo */
case 1283: /* cmphi */
value = 1283; /* --> cmphi. */
break;
- case 1977: /* cmpls */
+ case 1993: /* cmpls */
case 1286: /* cmphs */
value = 1286; /* --> cmphs. */
break;
@@ -490,7 +490,7 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
case 1309: /* cpy */
value = 1309; /* --> cpy. */
break;
- case 1985: /* fmov */
+ case 2001: /* fmov */
case 1225: /* mov */
case 1310: /* cpy */
value = 1310; /* --> cpy. */
@@ -504,7 +504,7 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
case 1323: /* dup */
value = 1323; /* --> dup. */
break;
- case 1984: /* fmov */
+ case 2000: /* fmov */
case 1219: /* mov */
case 1324: /* dup */
value = 1324; /* --> dup. */
@@ -513,7 +513,7 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
case 1325: /* dupm */
value = 1325; /* --> dupm. */
break;
- case 1979: /* eon */
+ case 1995: /* eon */
case 1327: /* eor */
value = 1327; /* --> eor. */
break;
@@ -525,19 +525,19 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
case 1330: /* eors */
value = 1330; /* --> eors. */
break;
- case 1980: /* facle */
+ case 1996: /* facle */
case 1335: /* facge */
value = 1335; /* --> facge. */
break;
- case 1981: /* faclt */
+ case 1997: /* faclt */
case 1336: /* facgt */
value = 1336; /* --> facgt. */
break;
- case 1982: /* fcmle */
+ case 1998: /* fcmle */
case 1349: /* fcmge */
value = 1349; /* --> fcmge. */
break;
- case 1983: /* fcmlt */
+ case 1999: /* fcmlt */
case 1351: /* fcmgt */
value = 1351; /* --> fcmgt. */
break;
@@ -550,28 +550,28 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
value = 1380; /* --> fdup. */
break;
case 1213: /* mov */
- case 1695: /* orr */
- value = 1695; /* --> orr. */
+ case 1711: /* orr */
+ value = 1711; /* --> orr. */
break;
- case 1986: /* orn */
- case 1696: /* orr */
- value = 1696; /* --> orr. */
+ case 2002: /* orn */
+ case 1712: /* orr */
+ value = 1712; /* --> orr. */
break;
case 1216: /* mov */
- case 1698: /* orr */
- value = 1698; /* --> orr. */
+ case 1714: /* orr */
+ value = 1714; /* --> orr. */
break;
case 1226: /* movs */
- case 1699: /* orrs */
- value = 1699; /* --> orrs. */
+ case 1715: /* orrs */
+ value = 1715; /* --> orrs. */
break;
case 1221: /* mov */
- case 1761: /* sel */
- value = 1761; /* --> sel. */
+ case 1777: /* sel */
+ value = 1777; /* --> sel. */
break;
case 1224: /* mov */
- case 1762: /* sel */
- value = 1762; /* --> sel. */
+ case 1778: /* sel */
+ value = 1778; /* --> sel. */
break;
default: return NULL;
}
@@ -613,7 +613,6 @@ aarch64_insert_operand (const aarch64_operand *self,
case 27:
case 28:
case 29:
- case 151:
case 152:
case 153:
case 154:
@@ -623,7 +622,7 @@ aarch64_insert_operand (const aarch64_operand *self,
case 158:
case 159:
case 160:
- case 173:
+ case 161:
case 174:
case 175:
case 176:
@@ -632,8 +631,9 @@ aarch64_insert_operand (const aarch64_operand *self,
case 179:
case 180:
case 181:
- case 185:
- case 188:
+ case 182:
+ case 186:
+ case 189:
return aarch64_ins_regno (self, info, code, inst);
case 13:
return aarch64_ins_reg_extended (self, info, code, inst);
@@ -644,7 +644,7 @@ aarch64_insert_operand (const aarch64_operand *self,
case 30:
case 31:
case 32:
- case 190:
+ case 191:
return aarch64_ins_reglane (self, info, code, inst);
case 33:
return aarch64_ins_reglist (self, info, code, inst);
@@ -676,9 +676,8 @@ aarch64_insert_operand (const aarch64_operand *self,
case 76:
case 77:
case 78:
- case 148:
- case 150:
- case 165:
+ case 149:
+ case 151:
case 166:
case 167:
case 168:
@@ -686,6 +685,7 @@ aarch64_insert_operand (const aarch64_operand *self,
case 170:
case 171:
case 172:
+ case 173:
return aarch64_ins_imm (self, info, code, inst);
case 41:
case 42:
@@ -695,10 +695,10 @@ aarch64_insert_operand (const aarch64_operand *self,
case 45:
return aarch64_ins_advsimd_imm_modified (self, info, code, inst);
case 49:
- case 139:
+ case 140:
return aarch64_ins_fpimm (self, info, code, inst);
case 64:
- case 146:
+ case 147:
return aarch64_ins_limm (self, info, code, inst);
case 65:
return aarch64_ins_aimm (self, info, code, inst);
@@ -708,10 +708,10 @@ aarch64_insert_operand (const aarch64_operand *self,
return aarch64_ins_fbits (self, info, code, inst);
case 69:
case 70:
- case 144:
+ case 145:
return aarch64_ins_imm_rotate2 (self, info, code, inst);
case 71:
- case 143:
+ case 144:
return aarch64_ins_imm_rotate1 (self, info, code, inst);
case 72:
case 73:
@@ -777,8 +777,8 @@ aarch64_insert_operand (const aarch64_operand *self,
case 119:
case 120:
case 121:
- return aarch64_ins_sve_addr_rr_lsl (self, info, code, inst);
case 122:
+ return aarch64_ins_sve_addr_rr_lsl (self, info, code, inst);
case 123:
case 124:
case 125:
@@ -786,48 +786,49 @@ aarch64_insert_operand (const aarch64_operand *self,
case 127:
case 128:
case 129:
- return aarch64_ins_sve_addr_rz_xtw (self, info, code, inst);
case 130:
+ return aarch64_ins_sve_addr_rz_xtw (self, info, code, inst);
case 131:
case 132:
case 133:
- return aarch64_ins_sve_addr_zi_u5 (self, info, code, inst);
case 134:
- return aarch64_ins_sve_addr_zz_lsl (self, info, code, inst);
+ return aarch64_ins_sve_addr_zi_u5 (self, info, code, inst);
case 135:
- return aarch64_ins_sve_addr_zz_sxtw (self, info, code, inst);
+ return aarch64_ins_sve_addr_zz_lsl (self, info, code, inst);
case 136:
- return aarch64_ins_sve_addr_zz_uxtw (self, info, code, inst);
+ return aarch64_ins_sve_addr_zz_sxtw (self, info, code, inst);
case 137:
- return aarch64_ins_sve_aimm (self, info, code, inst);
+ return aarch64_ins_sve_addr_zz_uxtw (self, info, code, inst);
case 138:
+ return aarch64_ins_sve_aimm (self, info, code, inst);
+ case 139:
return aarch64_ins_sve_asimm (self, info, code, inst);
- case 140:
- return aarch64_ins_sve_float_half_one (self, info, code, inst);
case 141:
- return aarch64_ins_sve_float_half_two (self, info, code, inst);
+ return aarch64_ins_sve_float_half_one (self, info, code, inst);
case 142:
+ return aarch64_ins_sve_float_half_two (self, info, code, inst);
+ case 143:
return aarch64_ins_sve_float_zero_one (self, info, code, inst);
- case 145:
+ case 146:
return aarch64_ins_inv_limm (self, info, code, inst);
- case 147:
+ case 148:
return aarch64_ins_sve_limm_mov (self, info, code, inst);
- case 149:
+ case 150:
return aarch64_ins_sve_scale (self, info, code, inst);
- case 161:
case 162:
- return aarch64_ins_sve_shlimm (self, info, code, inst);
case 163:
+ return aarch64_ins_sve_shlimm (self, info, code, inst);
case 164:
+ case 165:
return aarch64_ins_sve_shrimm (self, info, code, inst);
- case 182:
case 183:
case 184:
+ case 185:
return aarch64_ins_sve_quad_index (self, info, code, inst);
- case 186:
- return aarch64_ins_sve_index (self, info, code, inst);
case 187:
- case 189:
+ return aarch64_ins_sve_index (self, info, code, inst);
+ case 188:
+ case 190:
return aarch64_ins_sve_reglist (self, info, code, inst);
default: assert (0); abort ();
}
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index af36a15..3507329 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -2340,7 +2340,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0001100100xxxxxxxxxxxxxxxxxxxxxx
stlurb. */
- return 2028;
+ return 2044;
}
else
{
@@ -2348,7 +2348,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1001100100xxxxxxxxxxxxxxxxxxxxxx
stlur. */
- return 2036;
+ return 2052;
}
}
else
@@ -2359,7 +2359,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0101100100xxxxxxxxxxxxxxxxxxxxxx
stlurh. */
- return 2032;
+ return 2048;
}
else
{
@@ -2367,7 +2367,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1101100100xxxxxxxxxxxxxxxxxxxxxx
stlur. */
- return 2039;
+ return 2055;
}
}
}
@@ -2414,7 +2414,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0001100101xxxxxxxxxxxxxxxxxxxxxx
ldapurb. */
- return 2029;
+ return 2045;
}
else
{
@@ -2422,7 +2422,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1001100101xxxxxxxxxxxxxxxxxxxxxx
ldapur. */
- return 2037;
+ return 2053;
}
}
else
@@ -2433,7 +2433,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0101100101xxxxxxxxxxxxxxxxxxxxxx
ldapurh. */
- return 2033;
+ return 2049;
}
else
{
@@ -2441,7 +2441,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1101100101xxxxxxxxxxxxxxxxxxxxxx
ldapur. */
- return 2040;
+ return 2056;
}
}
}
@@ -2491,7 +2491,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0001100110xxxxxxxxxxxxxxxxxxxxxx
ldapursb. */
- return 2031;
+ return 2047;
}
else
{
@@ -2499,7 +2499,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1001100110xxxxxxxxxxxxxxxxxxxxxx
ldapursw. */
- return 2038;
+ return 2054;
}
}
else
@@ -2508,7 +2508,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x101100110xxxxxxxxxxxxxxxxxxxxxx
ldapursh. */
- return 2035;
+ return 2051;
}
}
else
@@ -2519,7 +2519,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x001100111xxxxxxxxxxxxxxxxxxxxxx
ldapursb. */
- return 2030;
+ return 2046;
}
else
{
@@ -2527,7 +2527,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x101100111xxxxxxxxxxxxxxxxxxxxxx
ldapursh. */
- return 2034;
+ return 2050;
}
}
}
@@ -2920,7 +2920,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx0xx10xxxxxxxxxx
setf8. */
- return 2026;
+ return 2042;
}
else
{
@@ -2928,7 +2928,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx1xx10xxxxxxxxxx
setf16. */
- return 2027;
+ return 2043;
}
}
else
@@ -3074,7 +3074,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010000xxxxxxxxx01xxxxxxxxxx
rmif. */
- return 2025;
+ return 2041;
}
else
{
@@ -3609,7 +3609,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx010000000xxxxxxxxxxxxx
mul. */
- return 1686;
+ return 1702;
}
}
else
@@ -3620,7 +3620,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx001000000xxxxxxxxxxxxx
smax. */
- return 1765;
+ return 1781;
}
else
{
@@ -3628,7 +3628,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx011000000xxxxxxxxxxxxx
orr. */
- return 1697;
+ return 1713;
}
}
}
@@ -3640,7 +3640,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x0100000xxxxxxxxxxxxx
sdiv. */
- return 1756;
+ return 1772;
}
else
{
@@ -3648,7 +3648,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x1100000xxxxxxxxxxxxx
sabd. */
- return 1747;
+ return 1763;
}
}
}
@@ -3662,7 +3662,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x0010000xxxxxxxxxxxxx
smulh. */
- return 1770;
+ return 1786;
}
else
{
@@ -3672,7 +3672,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx001010000xxxxxxxxxxxxx
smin. */
- return 1768;
+ return 1784;
}
else
{
@@ -3690,7 +3690,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0xx110000xxxxxxxxxxxxx
sdivr. */
- return 1757;
+ return 1773;
}
}
}
@@ -3706,7 +3706,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x0001000xxxxxxxxxxxxx
sub. */
- return 1886;
+ return 1902;
}
else
{
@@ -3716,7 +3716,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx001001000xxxxxxxxxxxxx
umax. */
- return 1914;
+ return 1930;
}
else
{
@@ -3736,7 +3736,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x0101000xxxxxxxxxxxxx
udiv. */
- return 1908;
+ return 1924;
}
else
{
@@ -3744,7 +3744,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x1101000xxxxxxxxxxxxx
uabd. */
- return 1899;
+ return 1915;
}
}
}
@@ -3760,7 +3760,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx000011000xxxxxxxxxxxxx
subr. */
- return 1888;
+ return 1904;
}
else
{
@@ -3768,7 +3768,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx010011000xxxxxxxxxxxxx
umulh. */
- return 1919;
+ return 1935;
}
}
else
@@ -3779,7 +3779,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx001011000xxxxxxxxxxxxx
umin. */
- return 1917;
+ return 1933;
}
else
{
@@ -3797,7 +3797,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0xx111000xxxxxxxxxxxxx
udivr. */
- return 1909;
+ return 1925;
}
}
}
@@ -3842,7 +3842,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x0xxxxx000xx0xxxxxxxxxx
sdot. */
- return 1758;
+ return 1774;
}
else
{
@@ -3850,7 +3850,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x0xxxxx000xx1xxxxxxxxxx
udot. */
- return 1910;
+ return 1926;
}
}
else
@@ -3888,7 +3888,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx000100xxxxxxxxxx
sqadd. */
- return 1772;
+ return 1788;
}
}
else
@@ -3897,7 +3897,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx000x10xxxxxxxxxx
sqsub. */
- return 1802;
+ return 1818;
}
}
else
@@ -3910,7 +3910,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx000001xxxxxxxxxx
sub. */
- return 1884;
+ return 1900;
}
else
{
@@ -3918,7 +3918,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx000101xxxxxxxxxx
uqadd. */
- return 1920;
+ return 1936;
}
}
else
@@ -3927,7 +3927,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx000x11xxxxxxxxxx
uqsub. */
- return 1950;
+ return 1966;
}
}
}
@@ -3939,7 +3939,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x00x1xxxxx000xxxxxxxxxxxxx
prfb. */
- return 1705;
+ return 1721;
}
else
{
@@ -3959,7 +3959,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x00x1xxxxx000xxxxxxxxxxxxx
prfb. */
- return 1706;
+ return 1722;
}
else
{
@@ -3973,7 +3973,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0101xxxxx000xx0xxxxxxxxxx
sdot. */
- return 1759;
+ return 1775;
}
else
{
@@ -3981,7 +3981,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0111xxxxx000xx0xxxxxxxxxx
sdot. */
- return 1760;
+ return 1776;
}
}
else
@@ -3992,7 +3992,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0101xxxxx000xx1xxxxxxxxxx
udot. */
- return 1911;
+ return 1927;
}
else
{
@@ -4000,7 +4000,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0111xxxxx000xx1xxxxxxxxxx
udot. */
- return 1912;
+ return 1928;
}
}
}
@@ -4090,7 +4090,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx000001100xxxxxxxxxxxxx
lsr. */
- return 1677;
+ return 1693;
}
else
{
@@ -4098,7 +4098,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx010001100xxxxxxxxxxxxx
lsr. */
- return 1675;
+ return 1691;
}
}
else
@@ -4107,7 +4107,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x1001100xxxxxxxxxxxxx
lsr. */
- return 1676;
+ return 1692;
}
}
else
@@ -4116,7 +4116,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0xx101100xxxxxxxxxxxxx
lsrr. */
- return 1678;
+ return 1694;
}
}
else
@@ -4131,7 +4131,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx000011100xxxxxxxxxxxxx
lsl. */
- return 1671;
+ return 1687;
}
else
{
@@ -4139,7 +4139,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx010011100xxxxxxxxxxxxx
lsl. */
- return 1669;
+ return 1685;
}
}
else
@@ -4148,7 +4148,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x1011100xxxxxxxxxxxxx
lsl. */
- return 1670;
+ return 1686;
}
}
else
@@ -4157,7 +4157,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0xx111100xxxxxxxxxxxxx
lslr. */
- return 1672;
+ return 1688;
}
}
}
@@ -4193,7 +4193,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx100001xxxxxxxxxx
lsr. */
- return 1673;
+ return 1689;
}
else
{
@@ -4201,7 +4201,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx100101xxxxxxxxxx
lsr. */
- return 1674;
+ return 1690;
}
}
else
@@ -4212,7 +4212,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx100011xxxxxxxxxx
lsl. */
- return 1667;
+ return 1683;
}
else
{
@@ -4220,7 +4220,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx100111xxxxxxxxxx
lsl. */
- return 1668;
+ return 1684;
}
}
}
@@ -4318,7 +4318,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x0011xxxxx100xxxxxxxxxxxxx
prfb. */
- return 1707;
+ return 1723;
}
else
{
@@ -4347,7 +4347,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0xxxxx010xxxxxxxxxxxxx
mla. */
- return 1680;
+ return 1696;
}
else
{
@@ -4434,7 +4434,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0101xxxxx01010xxxxxxxxxxx
rdvl. */
- return 1741;
+ return 1757;
}
}
else
@@ -4475,7 +4475,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x00x1xxxxx010xxxxxxxxxxxxx
prfw. */
- return 1725;
+ return 1741;
}
else
{
@@ -4495,7 +4495,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x00x1xxxxx010xxxxxxxxxxxxx
prfw. */
- return 1727;
+ return 1743;
}
else
{
@@ -4520,7 +4520,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0xxxxx110xxxxxxxxxxxxx
mad. */
- return 1679;
+ return 1695;
}
else
{
@@ -4536,7 +4536,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0x010xxxx110x00xxxxxxxxxx
sqincw. */
- return 1799;
+ return 1815;
}
else
{
@@ -4546,7 +4546,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00110xxxx110x00xxxxxxxxxx
sqinch. */
- return 1793;
+ return 1809;
}
else
{
@@ -4554,7 +4554,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01110xxxx110x00xxxxxxxxxx
sqincd. */
- return 1790;
+ return 1806;
}
}
}
@@ -4597,7 +4597,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0x01xxxxx110x10xxxxxxxxxx
sqdecw. */
- return 1785;
+ return 1801;
}
else
{
@@ -4607,7 +4607,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0011xxxxx110x10xxxxxxxxxx
sqdech. */
- return 1779;
+ return 1795;
}
else
{
@@ -4615,7 +4615,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0111xxxxx110x10xxxxxxxxxx
sqdecd. */
- return 1776;
+ return 1792;
}
}
}
@@ -4632,7 +4632,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0x010xxxx110x01xxxxxxxxxx
uqincw. */
- return 1947;
+ return 1963;
}
else
{
@@ -4642,7 +4642,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00110xxxx110x01xxxxxxxxxx
uqinch. */
- return 1941;
+ return 1957;
}
else
{
@@ -4650,7 +4650,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01110xxxx110x01xxxxxxxxxx
uqincd. */
- return 1938;
+ return 1954;
}
}
}
@@ -4693,7 +4693,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0x01xxxxx110x11xxxxxxxxxx
uqdecw. */
- return 1933;
+ return 1949;
}
else
{
@@ -4703,7 +4703,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0011xxxxx110x11xxxxxxxxxx
uqdech. */
- return 1927;
+ return 1943;
}
else
{
@@ -4711,7 +4711,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0111xxxxx110x11xxxxxxxxxx
uqdecd. */
- return 1924;
+ return 1940;
}
}
}
@@ -4730,7 +4730,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x0000xxxxx110xxxxxxxxxxxxx
prfb. */
- return 1704;
+ return 1720;
}
else
{
@@ -4738,7 +4738,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x0100xxxxx110xxxxxxxxxxxxx
prfh. */
- return 1719;
+ return 1735;
}
}
else
@@ -4832,7 +4832,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x0011xxxxx110xxxxxxxxxxxxx
prfw. */
- return 1728;
+ return 1744;
}
else
{
@@ -4872,7 +4872,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx000x00001xxxxxxxxxxxxx
saddv. */
- return 1748;
+ return 1764;
}
else
{
@@ -4880,7 +4880,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx000x01001xxxxxxxxxxxxx
uaddv. */
- return 1900;
+ return 1916;
}
}
else
@@ -4889,7 +4889,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx010x0x001xxxxxxxxxxxxx
movprfx. */
- return 1683;
+ return 1699;
}
}
else
@@ -4902,7 +4902,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx001x00001xxxxxxxxxxxxx
smaxv. */
- return 1766;
+ return 1782;
}
else
{
@@ -4910,7 +4910,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx011x00001xxxxxxxxxxxxx
orv. */
- return 1700;
+ return 1716;
}
}
else
@@ -4921,7 +4921,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx001x01001xxxxxxxxxxxxx
umaxv. */
- return 1915;
+ return 1931;
}
else
{
@@ -4944,7 +4944,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx00xx10001xxxxxxxxxxxxx
sminv. */
- return 1769;
+ return 1785;
}
else
{
@@ -4961,7 +4961,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0xxx11001xxxxxxxxxxxxx
uminv. */
- return 1918;
+ return 1934;
}
}
}
@@ -4973,7 +4973,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x00x0xxxxx001xxxxxxxxxxxxx
ldff1sb. */
- return 1607;
+ return 1615;
}
else
{
@@ -4981,7 +4981,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x01x0xxxxx001xxxxxxxxxxxxx
ldff1sh. */
- return 1615;
+ return 1626;
}
}
}
@@ -4993,7 +4993,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x00x0xxxxx001xxxxxxxxxxxxx
ldff1sb. */
- return 1611;
+ return 1622;
}
else
{
@@ -5001,7 +5001,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x01x0xxxxx001xxxxxxxxxxxxx
ldff1sh. */
- return 1619;
+ return 1632;
}
}
}
@@ -5027,7 +5027,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0011xxxxx001xxxxxxxxxxxxx
orr. */
- return 1695;
+ return 1711;
}
}
else
@@ -5036,7 +5036,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x00x1xxxxx001xxxxxxxxxxxxx
prfh. */
- return 1718;
+ return 1734;
}
}
else
@@ -5045,7 +5045,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x00x1xxxxx001xxxxxxxxxxxxx
prfh. */
- return 1720;
+ return 1736;
}
}
else
@@ -5077,7 +5077,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x01x1xxxxx001xxxxxxxxxxxxx
ldff1sh. */
- return 1616;
+ return 1627;
}
}
else
@@ -5086,7 +5086,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x01x1xxxxx001xxxxxxxxxxxxx
ldff1sh. */
- return 1620;
+ return 1633;
}
}
}
@@ -5111,7 +5111,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x0000101xxxxxxxxxxxxx
sxtb. */
- return 1891;
+ return 1907;
}
else
{
@@ -5130,7 +5130,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x0100101xxxxxxxxxxxxx
sxtw. */
- return 1893;
+ return 1909;
}
else
{
@@ -5152,7 +5152,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x0010101xxxxxxxxxxxxx
sxth. */
- return 1892;
+ return 1908;
}
else
{
@@ -5179,7 +5179,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x1110101xxxxxxxxxxxxx
not. */
- return 1692;
+ return 1708;
}
}
}
@@ -5196,7 +5196,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x0001101xxxxxxxxxxxxx
uxtb. */
- return 1954;
+ return 1970;
}
else
{
@@ -5215,7 +5215,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x0101101xxxxxxxxxxxxx
uxtw. */
- return 1956;
+ return 1972;
}
else
{
@@ -5237,7 +5237,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x0011101xxxxxxxxxxxxx
uxth. */
- return 1955;
+ return 1971;
}
else
{
@@ -5254,7 +5254,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0xx111101xxxxxxxxxxxxx
neg. */
- return 1689;
+ return 1705;
}
}
}
@@ -5318,7 +5318,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx1011x1xxxxxxxxxx
movprfx. */
- return 1682;
+ return 1698;
}
}
}
@@ -5333,7 +5333,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x000xxxxxx101xxxxxxxxxxxxx
ldff1sb. */
- return 1613;
+ return 1624;
}
else
{
@@ -5341,7 +5341,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x010xxxxxx101xxxxxxxxxxxxx
ldff1sh. */
- return 1623;
+ return 1636;
}
}
else
@@ -5375,7 +5375,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x00x0xxxxx101xxxxxxxxxxxxx
ldff1sb. */
- return 1612;
+ return 1623;
}
else
{
@@ -5383,7 +5383,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x01x0xxxxx101xxxxxxxxxxxxx
ldff1sh. */
- return 1621;
+ return 1634;
}
}
else
@@ -5396,7 +5396,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x0001xxxxx101xxxxxxxxxxxxx
ldff1sb. */
- return 1614;
+ return 1625;
}
else
{
@@ -5404,7 +5404,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x0101xxxxx101xxxxxxxxxxxxx
ldff1sh. */
- return 1624;
+ return 1637;
}
}
else
@@ -5415,7 +5415,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x0011xxxxx101xxxxxxxxxxxxx
prfh. */
- return 1721;
+ return 1737;
}
else
{
@@ -5423,7 +5423,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x0111xxxxx101xxxxxxxxxxxxx
ldff1sh. */
- return 1622;
+ return 1635;
}
}
}
@@ -5444,7 +5444,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0xxxxx011xxxxxxxxxxxxx
mls. */
- return 1681;
+ return 1697;
}
else
{
@@ -5462,7 +5462,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x01x0xxxxx011xxxxxxxxxxxxx
ldff1h. */
- return 1596;
+ return 1601;
}
}
}
@@ -5474,7 +5474,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x00x0xxxxx011xxxxxxxxxxxxx
ldff1b. */
- return 1586;
+ return 1590;
}
else
{
@@ -5482,7 +5482,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x01x0xxxxx011xxxxxxxxxxxxx
ldff1h. */
- return 1601;
+ return 1609;
}
}
}
@@ -5496,7 +5496,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00001x00x1xxxxx011xxxxxxxxxxxxx
prfd. */
- return 1711;
+ return 1727;
}
else
{
@@ -5504,7 +5504,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x00x1xxxxx011xxxxxxxxxxxxx
prfd. */
- return 1713;
+ return 1729;
}
}
else
@@ -5515,7 +5515,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00001x01x1xxxxx011xxxxxxxxxxxxx
ldff1h. */
- return 1597;
+ return 1602;
}
else
{
@@ -5523,7 +5523,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x01x1xxxxx011xxxxxxxxxxxxx
ldff1h. */
- return 1602;
+ return 1610;
}
}
}
@@ -5540,7 +5540,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0xxxxx111xxxxxxxxxxxxx
msb. */
- return 1684;
+ return 1700;
}
else
{
@@ -5645,7 +5645,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00010xxxx111100xxxxxxxxxx
sqincb. */
- return 1789;
+ return 1805;
}
else
{
@@ -5653,7 +5653,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01010xxxx111100xxxxxxxxxx
sqincw. */
- return 1801;
+ return 1817;
}
}
else
@@ -5664,7 +5664,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00110xxxx111100xxxxxxxxxx
sqinch. */
- return 1795;
+ return 1811;
}
else
{
@@ -5672,7 +5672,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01110xxxx111100xxxxxxxxxx
sqincd. */
- return 1792;
+ return 1808;
}
}
}
@@ -5686,7 +5686,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00011xxxx111100xxxxxxxxxx
sqincb. */
- return 1788;
+ return 1804;
}
else
{
@@ -5694,7 +5694,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01011xxxx111100xxxxxxxxxx
sqincw. */
- return 1800;
+ return 1816;
}
}
else
@@ -5705,7 +5705,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00111xxxx111100xxxxxxxxxx
sqinch. */
- return 1794;
+ return 1810;
}
else
{
@@ -5713,7 +5713,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01111xxxx111100xxxxxxxxxx
sqincd. */
- return 1791;
+ return 1807;
}
}
}
@@ -5731,7 +5731,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00010xxxx111x10xxxxxxxxxx
sqdecb. */
- return 1775;
+ return 1791;
}
else
{
@@ -5739,7 +5739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01010xxxx111x10xxxxxxxxxx
sqdecw. */
- return 1787;
+ return 1803;
}
}
else
@@ -5750,7 +5750,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00110xxxx111x10xxxxxxxxxx
sqdech. */
- return 1781;
+ return 1797;
}
else
{
@@ -5758,7 +5758,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01110xxxx111x10xxxxxxxxxx
sqdecd. */
- return 1778;
+ return 1794;
}
}
}
@@ -5772,7 +5772,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00011xxxx111x10xxxxxxxxxx
sqdecb. */
- return 1774;
+ return 1790;
}
else
{
@@ -5780,7 +5780,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01011xxxx111x10xxxxxxxxxx
sqdecw. */
- return 1786;
+ return 1802;
}
}
else
@@ -5791,7 +5791,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
109876543210[...]
[diff truncated at 100000 bytes]
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