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[binutils-gdb] MIPS/include: opcode/mips.h: Correct INSN_CHIP_MASK
- From: Maciej W.Rozycki <macro at sourceware dot org>
- To: bfd-cvs at sourceware dot org
- Date: 7 Dec 2016 12:35:56 -0000
- Subject: [binutils-gdb] MIPS/include: opcode/mips.h: Correct INSN_CHIP_MASK
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=4b0781150f69b6ff251dac447c77e4d4f6598da8
commit 4b0781150f69b6ff251dac447c77e4d4f6598da8
Author: Maciej W. Rozycki <macro@imgtec.com>
Date: Wed Dec 7 03:12:50 2016 +0000
MIPS/include: opcode/mips.h: Correct INSN_CHIP_MASK
Complement commit e407c74b5b60 ("Support for MIPS R5900 (Sony Playstation
2)"), <https://sourceware.org/ml/binutils/2012-12/msg00240.html>, and
commit 2c62985659da ("MIPS: Add Octeon 3 support") and update the chip
mask accordingly.
include/
* opcode/mips.h (INSN_CHIP_MASK): Update according to bit use.
Diff:
---
include/ChangeLog | 4 ++++
include/opcode/mips.h | 2 +-
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/include/ChangeLog b/include/ChangeLog
index 7d37b15..00cebb6 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,5 +1,9 @@
2016-12-07 Maciej W. Rozycki <macro@imgtec.com>
+ * opcode/mips.h (INSN_CHIP_MASK): Update according to bit use.
+
+2016-12-07 Maciej W. Rozycki <macro@imgtec.com>
+
* opcode/mips.h (ASE_DSPR3): Add a comment.
2016-12-05 Szabolcs Nagy <szabolcs.nagy@arm.com>
diff --git a/include/opcode/mips.h b/include/opcode/mips.h
index 08bc24f..160fc91 100644
--- a/include/opcode/mips.h
+++ b/include/opcode/mips.h
@@ -1194,7 +1194,7 @@ static const unsigned int mips_isa_table[] = {
#undef ISAF
/* Masks used for Chip specific instructions. */
-#define INSN_CHIP_MASK 0xc3ff0f20
+#define INSN_CHIP_MASK 0xc3ff4f60
/* Cavium Networks Octeon instructions. */
#define INSN_OCTEON 0x00000800