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[binutils-gdb] MIPS/BFD: Correct register index calculation in BZ16_REG
- From: Maciej W.Rozycki <macro at sourceware dot org>
- To: bfd-cvs at sourceware dot org
- Date: 24 Jan 2016 01:06:12 -0000
- Subject: [binutils-gdb] MIPS/BFD: Correct register index calculation in BZ16_REG
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=e67f83e590b8ce7a9912f665aa559cbc98c05de6
commit e67f83e590b8ce7a9912f665aa559cbc98c05de6
Author: Maciej W. Rozycki <macro@imgtec.com>
Date: Sun Jan 24 00:49:26 2016 +0000
MIPS/BFD: Correct register index calculation in BZ16_REG
For the 3-bit register encodings of { 0, 1, 2, 3, 4, 5, 6, 7 } return
the 5-bit encodings of { 16, 17, 2, 3, 4, 5, 6, 7 } respectively rather
than { 24, 25, 2, 3, 4, 5, 6, 7 }.
bfd/
* elfxx-mips.c (BZ16_REG): Correct calculation.
Diff:
---
bfd/ChangeLog | 4 ++++
bfd/elfxx-mips.c | 2 +-
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 9c813ba..2e4f3b3 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,7 @@
+2016-01-24 Maciej W. Rozycki <macro@imgtec.com>
+
+ * elfxx-mips.c (BZ16_REG): Correct calculation.
+
2016-01-21 Nick Clifton <nickc@redhat.com>
* elf32-arc.c (ADD_RELA): Fix compile time warning errors by
diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c
index 4ece819..176970a 100644
--- a/bfd/elfxx-mips.c
+++ b/bfd/elfxx-mips.c
@@ -13110,7 +13110,7 @@ static const struct opcode_descriptor bz_insns_16[] = {
/* Switch between a 5-bit register index and its 3-bit shorthand. */
-#define BZ16_REG(opcode) ((((((opcode) >> 7) & 7) + 0x1e) & 0x17) + 2)
+#define BZ16_REG(opcode) ((((((opcode) >> 7) & 7) + 0x1e) & 0xf) + 2)
#define BZ16_REG_FIELD(r) \
(((2 <= (r) && (r) <= 7) ? (r) : ((r) - 16)) << 7)