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src include/opcode/mips.h include/opcode/Chang ...
- From: rsandifo at sourceware dot org
- To: binutils-cvs at sourceware dot org
- Date: 18 Dec 2010 11:14:15 -0000
- Subject: src include/opcode/mips.h include/opcode/Chang ...
CVSROOT: /cvs/src
Module name: src
Changes by: rsandifo@sourceware.org 2010-12-18 11:14:15
Modified files:
include/opcode : mips.h ChangeLog
opcodes : mips-opc.c mips-dis.c ChangeLog
gas/config : tc-mips.c
gas/testsuite/gas/mips: mips.exp
gas/testsuite : ChangeLog
gas : ChangeLog
Added files:
gas/testsuite/gas/mips: loongson-3a-2.s loongson-3a-2.d
loongson-3a-3.s loongson-3a-3.d
Log message:
include/opcode/
2010-12-14 Mingjie Xing <mingjie.xing@gmail.com>
* mips.h (OP_*_OFFSET_A, OP_*_OFFSET_B, OP_*_OFFSET_C)
(OP_*_RZ, OP_*_FZ, INSN2_M_FP_D, INSN2_WRITE_GPR_Z, INSN2_WRITE_FPR_Z)
(INSN2_READ_GPR_Z, INSN2_READ_FPR_Z, INSN2_READ_GPR_D): Define.
opcodes/
2010-12-14 Mingjie Xing <mingjie.xing@gmail.com>
* mips-opc.c (WR_z, WR_Z, RD_z, RD_Z, RD_d): Define.
(mips_builtin_opcodes): Add loongson3a specific instructions.
* mips-dis.c (print_insn_args): Handle the new arguments +a|b|c|z|Z.
gas/
2010-12-14 Mingjie Xing <mingjie.xing@gmail.com>
* config/tc-mips.c (insn_uses_reg): Handle the new flags
INSN2_READ_FPR_Z, INSN2_READ_GPR_D and INSN2_READ_GPR_Z.
(append_insn): Handle delay-slot filling for the new flags.
(validate_mips_insn): Handle the new arguments +a|b|c|z|Z.
(mips_ip): Handle the new arguments +a|b|c|z|Z.
gas/testsuite/
2010-12-14 Mingjie Xing <mingjie.xing@gmail.com>
* gas/mips/loongson-3a-2.s, gas/mips/loongson-3a-2.d,
gas/mips/loongson-3a-3.s, gas/mips/loongson-3a-3.d: New tests.
* gas/mips/mips.exp: Run them.
Patches:
http://sourceware.org/cgi-bin/cvsweb.cgi/src/include/opcode/mips.h.diff?cvsroot=src&r1=1.70&r2=1.71
http://sourceware.org/cgi-bin/cvsweb.cgi/src/include/opcode/ChangeLog.diff?cvsroot=src&r1=1.425&r2=1.426
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/mips-opc.c.diff?cvsroot=src&r1=1.83&r2=1.84
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/mips-dis.c.diff?cvsroot=src&r1=1.82&r2=1.83
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/ChangeLog.diff?cvsroot=src&r1=1.1675&r2=1.1676
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/config/tc-mips.c.diff?cvsroot=src&r1=1.452&r2=1.453
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/mips/loongson-3a-2.s.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/mips/loongson-3a-2.d.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/mips/loongson-3a-3.s.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/mips/loongson-3a-3.d.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/mips/mips.exp.diff?cvsroot=src&r1=1.177&r2=1.178
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/ChangeLog.diff?cvsroot=src&r1=1.1817&r2=1.1818
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/ChangeLog.diff?cvsroot=src&r1=1.4367&r2=1.4368