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src/opcodes ChangeLog arm-dis.c
- From: nickc at sourceware dot org
- To: binutils-cvs at sourceware dot org
- Date: 11 Nov 2009 09:44:46 -0000
- Subject: src/opcodes ChangeLog arm-dis.c
CVSROOT: /cvs/src
Module name: src
Changes by: nickc@sourceware.org 2009-11-11 09:44:46
Modified files:
opcodes : ChangeLog arm-dis.c
Log message:
PR binutils/10924
* arm-dis.c (UNPREDICTABLE_INSTRUCTION): New macro.
(print_insn_arm): Extend %s format control code to check for
unpredictable addressing modes. Add support for %S format control
code which suppresses this check.
(W_BIT, I_BIT, U_BIT, P_BIT): New macros.
(WRITEBACK_BIT_SET, IMMEDIATE_BIT_SET, NEGATIVE_BIT_SET,
PRE_BIT_SET): New macros.
(print_insn_coprocessor): Use the new macros instead of magic
constants.
(print_arm_address): Likewise.
(pirnt_insn_arm): Likewise.
(print_insn_thumb32): Likewise.
Patches:
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/ChangeLog.diff?cvsroot=src&r1=1.1492&r2=1.1493
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/arm-dis.c.diff?cvsroot=src&r1=1.109&r2=1.110