Instructions

Instructions for each machine:

m32r MEM - Memory


m32r ALU - ALU


m32r BR - Branch


m32r ACCUM - Accumulator


m32r MAC - Multiply/Accumulate


m32r MISC - Miscellaneous


m32r m32r - Generic M32R cpu


m32rx MEM - Memory


m32rx ALU - ALU


m32rx BR - Branch


m32rx ACCUM - Accumulator


m32rx MAC - Multiply/Accumulate


m32rx MISC - Miscellaneous


m32rx m32rx - M32RX cpu


m32r2 MEM - Memory


m32r2 ALU - ALU


m32r2 BR - Branch


m32r2 ACCUM - Accumulator


m32r2 MAC - Multiply/Accumulate


m32r2 MISC - Miscellaneous


m32r2 m32r2 - M32R2 cpu


Individual instructions descriptions


add - add reg/reg

add3 - add reg/slo16

addi - addi

addv - addv

addv3 - addv3

addx - addx

and - and reg/reg

and3 - and reg/uimm16

bc24 - bc with 24 bit displacement

bc8 - bc with 8 bit displacement

bcl24 - bcl with 24 bit displacement

bcl8 - bcl with 8 bit displacement

bclr - bclr

beq - beq

beqz - beqz

bgez - bgez

bgtz - bgtz

bl24 - bl with 24 bit displacement

bl8 - bl with 8 bit displacement

blez - blez

bltz - bltz

bnc24 - bnc with 24 bit displacement

bnc8 - bnc with 8 bit displacement

bncl24 - bncl with 24 bit displacement

bncl8 - bncl with 8 bit displacement

bne - bne

bnez - bnez

bra24 - bra with 24 displacement

bra8 - bra with 8 bit displacement

bset - bset

btst - btst

clrpsw - clrpsw

cmp - cmp

cmpeq - cmpeq

cmpi - cmpi

cmpu - cmpu

cmpui - cmpui

cmpz - cmpz

div - div

divb - divb

divh - divh

divu - divu

divub - divub

divuh - divuh

jc - jc

jl - jl

jmp - jmp

jnc - jnc

ld - ld

ld-d - ld-d

ld-plus - ld+

ld24 - ld24

ldb - ldb

ldb-d - ldb-d

ldh - ldh

ldh-d - ldh-d

ldi16 - ldi16

ldi8 - ldi8

ldub - ldub

ldub-d - ldub-d

lduh - lduh

lduh-d - lduh-d

lock - lock

machi - machi

machi-a - machi-a

maclh1 - maclh1

maclo - maclo

maclo-a - maclo-a

macwhi - macwhi

macwhi-a - macwhi-a

macwlo - macwlo

macwlo-a - macwlo-a

macwu1 - macwu1

msblo - msblo

mul - mul

mulhi - mulhi

mulhi-a - mulhi-a

mullo - mullo

mullo-a - mullo-a

mulwhi - mulwhi

mulwhi-a - mulwhi-a

mulwlo - mulwlo

mulwlo-a - mulwlo-a

mulwu1 - mulwu1

mv - mv

mvfachi - mvfachi

mvfachi-a - mvfachi-a

mvfaclo - mvfaclo

mvfaclo-a - mvfaclo-a

mvfacmi - mvfacmi

mvfacmi-a - mvfacmi-a

mvfc - mvfc

mvtachi - mvtachi

mvtachi-a - mvtachi-a

mvtaclo - mvtaclo

mvtaclo-a - mvtaclo-a

mvtc - mvtc

neg - neg

nop - nop

not - not

or - or reg/reg

or3 - or reg/ulo16

pcmpbz - pcmpbz

rac - rac

rac-dsi - rac-dsi

rach - rach

rach-dsi - rach-dsi

rem - rem

remb - remb

remh - remh

remu - remu

remub - remub

remuh - remuh

rte - rte

sadd - sadd

sat - sat

satb - satb

sath - sath

sc - sc

seth - seth

setpsw - setpsw

sll - sll

sll3 - sll

slli - sll

snc - snc

sra - sra

sra3 - sra

srai - sra

srl - srl

srl3 - srl

srli - srl

st - st

st-d - st-d

st-minus - st-

st-plus - st+

stb - stb

stb-d - stb-d

stb-plus - stb+

sth - sth

sth-d - sth-d

sth-plus - sth+

sub - sub

subv - sub:rv

subx - sub:rx

trap - trap

unlock - unlock

xor - xor reg/reg

xor3 - xor reg/uimm16


Macro Instructions

Macro instructions for each machine:

m32r - Generic M32R cpu

m32rx - M32RX cpu

m32r2 - M32R2 cpu

Individual macro-instructions descriptions


bc24r - relaxable bc24

bc8r - relaxable bc8

bcl24r - relaxable bcl24

bcl8r - relaxable bcl8

bl24r - relaxable bl24

bl8r - relaxable bl8

bnc24r - relaxable bnc24

bnc8r - relaxable bnc8

bncl24r - relaxable bncl24

bncl8r - relaxable bncl8

bra24r - relaxable bra24

bra8r - relaxable bra8

ld-2 - ld-2

ld-d2 - ld-d2

ldb-2 - ldb-2

ldb-d2 - ldb-d2

ldh-2 - ldh-2

ldh-d2 - ldh-d2

ldi16a - ldi16 alias

ldi8a - ldi8 alias

ldub-2 - ldub-2

ldub-d2 - ldub-d2

lduh-2 - lduh-2

lduh-d2 - lduh-d2

pop - pop

push - push

rac-d - rac-d

rac-ds - rac-ds

rach-d - rach-d

rach-ds - rach-ds

st-2 - st-2

st-d2 - st-d2

stb-2 - stb-2

stb-d2 - stb-d2

sth-2 - sth-2

sth-d2 - sth-d2


This documentation was machine generated from the cgen cpu description files for this architecture.
http://sources.redhat.com/cgen/