Following a recent change for handling --emit-relocs switch the Linker started producing static relocations for code generated by the linker itself. When generating R_PPC64_TOC16_DS relocations, which affects the low-order 16-bit of the instruction, the linker places them instead on the instruction boundary. In the example below the symbol-less relocations are the linker-generated ones and are placed improperly on instruction boundaries (10000a9c, 10000aa0, ...), while those with attached symbols are compiler-generated and are correctly placed on the 2-low-order bytes of the respective instruction (10000ada, 10000adc) 0000000010000a9c 000000000000003f R_PPC64_TOC16_DS 000000001001dab8 0000000010000aa0 000000000000003f R_PPC64_TOC16_DS 000000001001dab0 0000000010000aac 000000000000003f R_PPC64_TOC16_DS 000000001001da00 0000000010000ab4 000000000000003f R_PPC64_TOC16_DS 000000001001da10 0000000010000ab8 000000000000003f R_PPC64_TOC16_DS 000000001001da08 0000000010000ada 000000180000003f R_PPC64_TOC16_DS 000000001001d870 .got + 8 0000000010000adc 0000006d0000000a R_PPC64_REL24 0000000000000000 __libc_start_main@@GLIBC_2.3 + 0 0000000010000b0a 000000180000003f R_PPC64_TOC16_DS 000000001001d870 .got + 10 0000000010000b14 0000004e0000000a R_PPC64_REL24 0000000000000000 __gmon_start__ + 0 0000000010000b2e 000000180000003f R_PPC64_TOC16_DS 000000001001d870 .got + 18
http://sourceware.org/ml/binutils-cvs/2008-06/msg00021.html