Next: M68HC11-Modifiers, Previous: M68HC11-Opts, Up: M68HC11-Dependent
In the M68HC11 syntax, the instruction name comes first and it may
be followed by one or several operands (up to three). Operands are
separated by comma (`,'). In the normal mode,
as
will complain if too many operands are specified for
a given instruction. In the MRI mode (turned on with `-M' option),
it will treat them as comments. Example:
inx lda #23 bset 2,x #4 brclr *bot #8 foo
The following addressing modes are understood for 68HC11 and 68HC12:
The number may be omitted in which case 0 is assumed.
The M68HC12 has other more complex addressing modes. All of them are supported and they are represented below:
The number may be omitted in which case 0 is assumed.
The register can be either `X', `Y', `SP' or
`PC'. The assembler will use the smaller post-byte definition
according to the constant value (5-bit constant offset, 9-bit constant
offset or 16-bit constant offset). If the constant is not known by
the assembler it will use the 16-bit constant offset post-byte and the value
will be resolved at link time.
The register can be either `X', `Y', `SP' or `PC'.
The number must be in the range `-8'..`+8' and must not be 0.
The register can be either `X', `Y', `SP' or `PC'.
The accumulator register can be either `A', `B' or `D'.
The register can be either `X', `Y', `SP' or `PC'.
The register can be either `X', `Y', `SP' or `PC'.
For example:
ldab 1024,sp ldd [10,x] orab 3,+x stab -2,y- ldx a,pc sty [d,sp]