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8.25.1 Options

The PowerPC chip family includes several successive levels, using the same core instruction set, but including a few additional instructions at each level. There are exceptions to this however. For details on what instructions each variant supports, please see the chip's architecture reference manual.

The following table lists all available PowerPC options.

-mpwrx | -mpwr2
Generate code for POWER/2 (RIOS2).
-mpwr
Generate code for POWER (RIOS1)
-m601
Generate code for PowerPC 601.
-mppc, -mppc32, -m603, -m604
Generate code for PowerPC 603/604.
-m403, -m405
Generate code for PowerPC 403/405.
-m440
Generate code for PowerPC 440. BookE and some 405 instructions.
-m7400, -m7410, -m7450, -m7455
Generate code for PowerPC 7400/7410/7450/7455.
-mppc64, -m620
Generate code for PowerPC 620/625/630.
-mppc64bridge
Generate code for PowerPC 64, including bridge insns.
-mbooke64
Generate code for 64-bit BookE.
-mbooke, mbooke32
Generate code for 32-bit BookE.
-me300
Generate code for PowerPC e300 family.
-maltivec
Generate code for processors with AltiVec instructions.
-mpower4
Generate code for Power4 architecture.
-mpower5
Generate code for Power5 architecture.
-mcom
Generate code Power/PowerPC common instructions.
-many
Generate code for any architecture (PWR/PWRX/PPC).
-mregnames
Allow symbolic names for registers.
-mno-regnames
Do not allow symbolic names for registers.
-mrelocatable
Support for GCC's -mrelocatble option.
-mrelocatable-lib
Support for GCC's -mrelocatble-lib option.
-memb
Set PPC_EMB bit in ELF flags.
-mlittle, -mlittle-endian
Generate code for a little endian machine.
-mbig, -mbig-endian
Generate code for a big endian machine.
-msolaris
Generate code for Solaris.
-mno-solaris
Do not generate code for Solaris.