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4.3 ld and the ARM family

For the ARM, ld will generate code stubs to allow functions calls betweem ARM and Thumb code. These stubs only work with code that has been compiled and assembled with the -mthumb-interwork command line option. If it is necessary to link with old ARM object files or libraries, which have not been compiled with the -mthumb-interwork option then the --support-old-code command line switch should be given to the linker. This will make it generate larger stub functions which will work with non-interworking aware ARM code. Note, however, the linker does not support generating stubs for function calls to non-interworking aware Thumb code.

The --thumb-entry switch is a duplicate of the generic --entry switch, in that it sets the program's starting address. But it also sets the bottom bit of the address, so that it can be branched to using a BX instruction, and the program will start executing in Thumb mode straight away.

The --be8 switch instructs ld to generate BE8 format executables. This option is only valid when linking big-endian objects. The resulting image will contain big-endian data and little-endian code.

The R_ARM_TARGET1 relocation is typically used for entries in the .init_array section. It is interpreted as either R_ARM_REL32 or R_ARM_ABS32, depending on the target. The --target1-rel and --target1-abs switches override the default.

The --target2=type switch overrides the default definition of the R_ARM_TARGET2 relocation. Valid values for type, their meanings, and target defaults are as follows:

rel
R_ARM_REL32 (arm*-*-elf, arm*-*-eabi)
abs
R_ARM_ABS32 (arm*-*-symbianelf)
got-rel
R_ARM_GOT_PREL (arm*-*-linux, arm*-*-*bsd)

The R_ARM_V4BX relocation (defined by the ARM AAELF specification) enables objects compiled for the ARMv4 architecture to be interworking-safe when linked with other objects compiled for ARMv4t, but also allows pure ARMv4 binaries to be built from the same ARMv4 objects.

In the latter case, the switch --fix-v4bx must be passed to the linker, which causes v4t BX rM instructions to be rewritten as MOV PC,rM, since v4 processors do not have a BX instruction.

In the former case, the switch should not be used, and R_ARM_V4BX relocations are ignored.